דרושים » חשמל ואלקטרוניקה » FPGA Design Engineer

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.

This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.

Responsibilities

Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

We are looking for some exceptional talent to join our Design and Engineering team as a System Platform Team Lead
Your Day to Day.:
Lead a multidisciplinary team of embedded SW, FPGA/logic, verification and software engineers
Own the system-level architecture and execution of various SoC-based camera processing and control platforms including Xilinx MPSoC
Oversee development across ARM A53/R5, Linux, bare metal, FPGA logic, HLS, micro-controllers, host software, interfaces and system integration
Lead implementation and validation of image-processing algorithms developed by the algorithm team
Drive technical planning, design reviews, integration, debugging, risk management and execution
Stay hands-on through selected complex or quality-critical tasks to maintain deep system understanding
Coordinate closely with algorithms, electronics, sensor and system teams

Required Staff RTL IP/Component Design Engineer, Cloud
About the job
In this role, you will contribute in all phases of complex application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis and etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our latforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Define the block level design document such as interface protocol, block diagram, transaction flow and pipeline, etc.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, and VHDL), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Support synthesis, timing/power closure, and Field Programmable Gate Array (FPGA)/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

We are looking for a highly experienced Architecture Prototyping Engineer to join our R&D team and turn early-stage architectural concepts into working proof by creating or modifying any or many layers in a system (HW to Cloud).
You'll run bring-up on boards, set up lab benches, write FPGA RTL or embedded code, run simulations, and script measurement setups to take measurements and benchmarks.
You'll work across every electronics discipline, alongside algo, architects, logic designers, RF engineers, embedded developers, and physicists.
What You'll Do:
Build, bring up, and debug hardware prototype boards across analog, RF, power, digital, and mixed-signal domains.
Implement algorithms, write and simulate RTL, or embedded/Linux code
Lab measurements and benchmarks (scope, spectrum analyzer, network analyzer, power analysis)
Work directly with product and system architects to translate an early concept into a concrete, testable prototype.
Document findings.

Required CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing,
Responsibilities:
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and universal verification methodology (UVM), or formally verify designs with SystemVerilog assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Location: Tel Aviv office or our Beer Sheva office, which is located next to the train station
Responsibilities:
Drive verification of complex, high-speed ASIC/FPGA designs
Define and implement advanced verification methodologies
Collaborate with architecture, software, and validation teams
Mentor engineers and promote technical excellence
Work with technologies like high-speed interfaces, network processors, and SoCs.

Required SoC Edge-AI Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required Senior SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required Junior AI SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will join a high-performing Research and Development team dedicated to delivering high-quality silicon. You will partner with cross-functional technical teams throughout the full development lifecycle, taking ownership of quality assurance strategies from the initial concept through final tape-out.
Responsibilities
Plan digital design block verification by analyzing specifications and identifying critical scenarios with design engineers.
Create and enhance constrained-random environments using SystemVerilog and Universal Verification Methodology (UVM), or execute formal verification using SystemVerilog Assertions (SVA) and industry-leading tools.
Identify and write all types of coverage measures for corner-cases.
Debug test failures alongside design teams to ensure block correctness.
Analyze metrics to resolve coverage gaps and drive progress toward tape-out.