דרושים » הנדסה » Senior FPGA Developer

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the Platform team.
This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.
Responsibilities:
Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

Power the Future with us!  we're a global leader in smart energy technology, with over 3,000 employees, offices in 34 countries, and millions of installations worldwide. Our innovative solutions include solar inverters, battery Storage, backup systems, EV charging, and AI-based energy management. We're committed to making clean, green energy the primary power source for homes, businesses, and beyond. With the growing demand for electricity, the need for smart, clean energy sources is constantly rising. we offer amazing opportunities to develop your skills in a multidisciplinary environment, covering everything from research and development to production and customer supply. Work with talented colleagues, tackle exciting challenges, and help create a sustainable future in an industry that's always evolving and innovating. Join us and be part of a company that values creativity, agility, and impactful work. We are seeking a sharp, experienced Hardware team leader to lead the design of the digital and mixed-signal boards at the heart of advanced energy Storage products. This is a hands-on technical leadership role for an engineer with deep, real-world experience in the disciplines that make or break a mixed-signal design - grounding, EMI, robust communication, and accurate measurement - and, just as importantly, in how these are verified at the board and full- system level. What will you be doing:
* Leading the HW design of the digital and mixed-signal boards and products, from concept through mass production
* Owning the design of accurate measurements, robust communication, grounding, and power distribution - across the boards and at the system level
* Defining how these are verified and characterized, both on the bench and within the complete system
* Managing and growing the team - owning the team's tasks, design reviews, and timelines
* Leading several development projects in parallel, across all project stages up to mass production
* Working in a multidisciplinary environment and collaborating across departments and sites
Country:
Israel
City:
Herzliya

Required Senior SoC Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required Senior CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for an experienced system engineer to participate and lead the development of a radio-based drone detection and mitigation system as part of the company products.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication
protocols.
Develop and optimize algorithms for scanning, signal separation, antenna selection, etc.
Define requirements and guide other multi-disciplinary teams (SW, Modem algorithms, DSP, and FPGA) through
implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including
radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like
MATLAB, Python, Excel, and other log analysis software.
Gain a deep understanding of the full system to guide and support development, testing and validation teams.

we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a talented Principal Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.
As an Principal Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.
Key Responsibilities
Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market
System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently
Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies.

We are looking for an experienced Senior System Integration Engineer to join our team.

The role involves planning and executing system integration activities across multiple subsystems, from development through production. You will work with complex systems combining software, computing, IP networks, communications, RF, navigation & control, algorithms, and computer vision.

Responsibilities
System operation and troubleshooting, planning and executing integration processes, writing integration test specifications, preparing performance validation tests, and analyzing system behavior and performance.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities:
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.