דרושים » תוכנה » Manager, AIR SaaS Platform Verification

We are seeking a Network Solution Verification Engineer to join our R&D organization, focused on validating our customer-facing networking solutions at scale using a state-of-the-art End-to-End (E2E) simulation cluster environment.

In this role, you will be a hands-on technical contributor at the intersection of networking, automation, and AI-driven validation - designing and implementing the simulation frameworks, agentic workflows, and regression pipelines that ensure our networking solutions meet the highest standards of quality and real-world applicability before reaching customers.


What you'll be doing:
Designing and implementing end-to-end validation frameworks for our customer-facing networking solutions at scale, leveraging a dedicated E2E simulation cluster environment.
Writing, maintaining, and extending automated test suites and regression pipelines for networking protocols and large-scale simulation runs, ensuring repeatable, high-confidence validation outcomes.
Performing deep regression analysis on simulation results - identifying failure trends, isolating root causes, and delivering clear, actionable findings to architecture and design teams.
Developing agentic AI flows that autonomously perform regression analysis, detect coverage gaps, generate new test cases, and implement validation code - continuously learning from simulation results and product changes to accelerate coverage without manual intervention.
Integrating validation pipelines into CI/CD workflows to enable continuous, automated regression at scale, working closely with DevOps and platform teams.
Collaborating closely with Design, Architecture, and NCS teams to understand solution requirements, translate them into simulation scenarios, and provide early-cycle quality feedback that influences product direction.
Analyzing customer-reported networking issues, mapping them to simulation coverage gaps, and building targeted test cases that prevent regression.
Continuously exploring new simulation technologies, agentic frameworks, and networking standards to evolve and improve the team's validation methodology.

Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.

We are looking for a Full-Chip verification & Integration Engineer to join our FullChip Switch Silicon team. As part of NVIDIAs Networking business unit, you will work alongside passionate and highly skilled engineers building the next generation of state-of-the-art switch silicon chips. This is a unique opportunity to grow in a technically rich environment and gain broad system-level exposure, and contribute to cutting-edge devices that deliver world-class bandwidth, throughput, and latency.

In this role, you will help integrate and validate complex full-chip flows at the system level, working across multiple engineering domains and learning how advanced silicon products come together from architecture to execution.

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within the organizations such as Architecture, u-arch, Firmware and all switch units and Ips.

Play a key role in validating the most complex end-to-end chip flows, gaining hands-on experience with system behavior, cross-block interactions, and real product-level scenarios.

Use modern AI-powered engineering tools and automation techniques as part of your day-to-day development and debug workflow.

Learn from experienced engineers in a collaborative environment that encourages technical growth, ownership, and continuous improvement.

We are looking for a Chip Design Verification Engineer to develop the next generation of DFT technologies.

As a Chip Design Verification Engineer in the DFT team at NVIDIA, you will verify the design and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and complex products. Our DFT solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

we are looking for a Engineering Team Lead.
In this role, you will take an integral part in the creation of a new and innovative SaaS product.
If you are a talented software engineer that likes to solve complex problems and looking for your next challenge we want you to join our team!
What youll do: As the Team Leader , you will lead a talented team to design, implement, and deploy scalable data solutions for an innovative SaaS product. Youll be responsible for shaping the direction of a system that impacts millions of users worldwide. If you're an experienced manager with a strong technical background, ready to lead in a dynamic, fast-paced production environment, we want you on our team!
Responsibilities:
Collaborate effectively with cross-functional teams (Data Science, Security, etc.) to ensure alignment on business needs and security standards.
Manage the technical backlog, make critical decisions on product milestones, and ensure timely, secure, high-quality delivery and deployment.
Foster the growth of team members through mentorship, personal development opportunities, and the promotion of continuous improvement.
Identify, manage, and mitigate security risks across the data platform, maintaining high standards in all initiatives.
Define and implement methodologies to guarantee the performance, scalability, and quality of our data infrastructure.

We are looking for an experienced DFT Engineer to join an exceptional team of DFT experts to develop the next generation DFT technologies.

As a DFT engineer at the networking group, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:

In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.

As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.

Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

We are looking for an experienced Firmware Engineer to join the QoS NIC Firmware team at the Yokneam or Tel-Aviv site. You will take part in leading a major development team in our Firmware group while taking part hands-on with development activities. The Firmware team develops cutting edge networking features. We drive the data growth of the worlds biggest companies. With talented engineers around the globe, the work environment is dynamic, meaningful, and fast-paced.

What you will be doing:

Take part in research, design, and development of QoS and FW algorithms, enhancing performance, reliability, and scalability.

Work closely with the architecture and different software design teams.

Implement new features in the core of our NIC Firmware in pre and post silicon environment.

Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

Gain a deep understanding of system debug, networking technology and stacks, as well as the HW/FW/SW relationship.

We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the software infrastructure and tools that shape the future of Chip Design and Verification. This role works at the intersection of infrastructure engineering, tooling, and database ownership. Youll be responsible for the backbone systems that enable the development of our industry-leading networking chips - the highway for the AI revolution.

We're looking for a senior hands-on engineer who combines deep expertise in Python automation and CI/CD data flows with a passion for large-scale compute environments. If youre excited about optimizing critical systems, owning the health of compute farms, and driving reliability across cross-functional teams, youll feel right at home here.

What youll be doing:

Partner with Chip Design teams to solve engineering bottlenecks: Collaborate closely with Design, Verification, and Methodology teams to identify workflow pain points and deliver infrastructure solutions that directly improve chip design productivity and quality.

Build automation infrastructure: Design, build, and maintain robust Python-based automation infrastructure that orchestrates chip design flows, monitoring, and infrastructure tooling.

Drive the compute infrastructure scalability, integrity and performance

Own the platform health: Take ownership of the day-to-day health, capacity, and reliability of our compute farm and storage systems. This includes leading incident response, triage, and implementing long-term fixes to ensure high availability.

Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.