We are seeking an experienced HW Team Leader to drive the engineering efforts behind our electronic systems. This role will focus on enhancing the testability, production efficiency, and quality of our products by defining Design for Testability (DFT) strategies, developing production test solutions, and leading failures investigation and correction.
What You'll Do:
Lead and mentor a team of highly skilled hardware engineers.
Drive execution in a fast-paced, multi-project environment.
Own and evolve our Design for Testability (DFT) strategy and guidelines.
Lead end-to-end development of production test solutions and test facilities.
Drive root-cause investigations, failure analysis, and product improvement initiatives.
Collaborate closely with R&D, manufacturing, and quality teams to ensure product reliability and production readiness.

Required Senior SoC Hardware Quality and Reliability Engineer
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Own technical specifications, architectural definitions, and physical power-on of custom qualification vehicles (HTOL load boards, ESD fixtures, latch-up rigs). Drive external layout vendors to achieve seamless electrical correlation with ATE environments.
Govern execution quality of applied stresses, define electrical, thermal, and telemetry parameters on test vehicles to ensure uniform, valid stress profiles without unintended overstress or setup artifacts.
Lead the end-to-end engineering delivery lifecycle for qualification hardware, map and drive critical cross-functional dependencies across internal validation and product engineering teams to ensure on-time readiness.
Serve as the primary technical interface for external PCB layout houses, fabrication shops, and component suppliers; manage design reviews, track lead times, and enforce delivery schedules.
Lead laboratory troubleshooting for qualification hardware anomalies; isolate setup/socket faults from true silicon failures and drive supplier corrective actions (CAPA) when board excursions occur.

Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're behind groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.

We are looking for a hands-on FPGA Design Engineer, specialized in high-performance digital design and FPGA-based system development, as part of the QM-Platform team.

This role involves ownership of FPGA interfaces and connectivity logic, including high-speed communication blocks, platform integration, and close collaboration with embedded and hardware teams. You will work on complex FPGA/SoC platforms, enabling robust and scalable solutions for quantum control systems.

Responsibilities

Own the design and implementation of FPGA-based interfaces such as PCIe, I2C, SPI, and high-speed GT communication.
Develop and integrate FPGA logic on advanced platforms, including Xilinx UltraScale+ and Versal.
Collaborate closely with embedded, hardware, and system teams to ensure seamless HW/SW/FPGA integration.
Drive FPGA bring-up, debugging, and validation at both lab and system levels.
Participate in system architecture definition and cross-team design decisions.

Required CPU Design for Test Engineer, Cloud
In this role, you will be part of a varied team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design-for-Test (DFT) Engineer, you will play a crucial role in DFT design, and support devices of extreme complexity to production. You will be responsible for developing flows, automation, and methodology, executing DFT activities. You will be responsible for test vectors end-to-end, from generating DFT content on complex design, debugging to coverage goals, simulating it at gate level, sign-off DFT to tapeout, and debugging Si results.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency,
We're behind our groundbreaking innovations, empowering the development of AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for array DFT, hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG, scan coverage debug and drive design fixes for coverage and quality improvements.
Perform DFT verification at RTL and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT design requirements are met and mutual dependencies are managed.

Required SoC Quality and Reliability Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our data centers are the most advanced in the world. In this role, you will help build the state-of-the art SoCs that power these data centers by driving quality and reliability processes from the Integrated Circuit perspective. This is an opportunity to create silicon and follow it into the field (and back!) to drive improvements for the next-generations of chips.
In this role, you will understand Integrated circuit (IC) flows, wafer processing, testing, qualification, yield, reliability, and failure analysis. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. Within the larger organization you will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
Responsibilities
Drive the strategic definition and development of Design-for-Reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
Define and lead the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure robust silicon and package verification.
Execute comprehensive silicon and package qualification programs (including HTOL, ELFR, ESD/LU, b/HAST, etc.) and conduct in-depth failure analysis to resolve quality issues.
Extract and analyze large-scale data from qualification programs, high-volume manufacturing, and field returns to identify failure mechanisms and trends for yield and reliability optimization.
Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, TDDB, NBTI) to predict device failure mechanisms and lifetime behaviors.

Required SOC Quality and Reliability Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our data centers are the most advanced in the world. In this role, you will help build the SoCs that power these data centers by driving quality and reliability processes from the integrated circuit perspective. You will create silicon and follow it into the field (and back) to drive improvements for the next generations of chips.
You will have an understanding of IC flows, wafer processing, testing, qualification, yield, reliability, and failure analysis. You will work with various cross functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. Within the larger organization you will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.

Responsibilities
Drive the strategic definition and development of design-for-reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
Define and lead the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure silicon and package verification.
Execute comprehensive silicon and package qualification programs (including high-temperature operating life (HTOL), early life failure rate (ELFR), electrostatic discharge/latch-up (ESD/LU), biased highly accelerated stress test (b/HAST), etc.) and conduct failure analysis to resolve quality issues.
Extract and analyze data from qualification programs, high-volume manufacturing, and field returns to identify failure mechanisms and trends for yield and reliability optimization.
Develop and implement physics-based statistical Quality and Reliability models (e.g., ELF, time-dependent dielectric breakdown (TDDB), negative bias temperature instability (NBTI) to predict device failure mechanisms and lifetime behaviors.

We are a rapidly growing startup company, developing the next-generation smart-infrastructure solution based on novel fiber-sensing technology (smart roads, smart cities, perimeters, and grid monitoring, etc). The company offers an award-winning disruptive solution; a sensor free approach to smart infrastructure. The company is VC backed and in the revenues stage. Combining pioneering technology in optical fiber sensing with state-of-the-art Machine Learning, we help prevent environmental disasters, protect human lives, and keep critical energy and transportation backbones running smoothly.
We are looking for a talented, self-driven, and hands-on Electro Optics Systems Engineer to join Photonics R&D team. In this role, you will develop and advance next-generation distributed fiber-optic acoustic sensing (DAS) systems, combining electro-optic system design, performance modeling, simulations, experimental validation, and field data analysis. You will tackle complex physical and engineering challenges, contribute to next-generation product development, and collaborate closely with multidisciplinary teams to bring innovative sensing technologies from concept to real-world deployment. This role is ideal for someone who thrives in a fast-paced, hands-on R&D environment, enjoys working across disciplines, and wants to see their work translate into real-world impact.
What Youll Do:
* Lead experimental and theoretical R&D efforts for the development of Prismas next-generation distributed fiber-optic acoustic sensing systems.
* Design, evaluate, and optimize electro-optic interrogation systems for distributed acoustic sensing applications.
* Develop system -level models and simulations for optical signal generation, fiber propagation, coherent detection, system noise, SNR, and sensing performance.
* Build software tools and simulations in Python, C ++, or similar languages for system evaluation, signal processing, field data analysis, and performance modeling.
* Plan, execute, and analyze laboratory and field experiments to validate system performance and support product development.
* Gain unique end-to-end expertise across the full sensing system pipeline, spanning fiber optics, electro-optics, coherent detection, DSP algorithms, and advanced data analysis.
* Lead product development activities from ideation and proof of concept through design, qualification, validation, and deployment.
* Collaborate closely with multidisciplinary R&D teams, including physicists, software engineers, algorithm developers, and hardware engineers.
* Communicate effectively with both technical and non-technical stakeholders, translating complex system behavior into clear insights and actionable recommendations.

We are looking for a Hardware Team Lead to own our electrical hardware from the first rough prototype all the way to a product that holds up in the field. You will lead a team of hardware engineers who work across most of what we build: board design and hands-on investigation, ultra-sensitive sensors, power circuits for our transmitters, RF and noise-sensitive systems, high-speed digital and communication, ADCs, DACs, and more.
We move fast, and that is a big part of the fun here. Quick prototypes and rough bring-ups are how we learn. Your job is to keep that speed, but make sure that when something proves itself it stops being a prototype and becomes real engineered hardware: reviewed, testable, documented, and built to be manufactured. You set the engineering bar, make the calls on design, and own the work we send to external design houses and suppliers, so that outsourced never means unowned.

Required ChipDev CAD Engineer, Hardware, Cloud
About the job
Cloud's software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our Cloud's needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. You will anticipate our customer needs and be empowered to act like an owner, take action and innovate. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
You will have the opportunity to find the perfect blend of software design practices and hardware development complexity. Whether your strength is in software coding, with a good understanding of hardware, or you are a hardware engineer with software proficiency, this balanced role will let you shine in both disciplines at the same time.
Cloud accelerates every organizations ability to digitally transform its business and industry. We deliver enterprise-grade solutions that leverage our technology, and tools that help developers build more sustainably. Customers in more than 200 countries and territories turn to Cloud as their trusted partner to enable growth and solve their most critical business problems.
Responsibilities
Manage project priorities, deadlines, and deliverables. Design, develop, test, deploy, maintain, and enhance software solutions.
Create software solutions that improve the hardware design process through automation. Propose, design, and implement software automation that directly addresses bottlenecks in today's ASIC and SoC EDA flow.
Work directly with the hardware team on projects prototype and then deploy tools to make a positive impact on our chip hardware development process. Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Triage product or system issues and debug/track/resolve by analyzing the issues and the impact on hardware and quality.