Required Staff GPU Verification Engineer
Join our GPU Hardware Verification team in Raanana, Israel, and help shape the future of the world's most widely deployed GPU architecture - Mali. As a Staff Hardware Verification Engineer, you will play a key technical role in verifying advanced GPU components and subsystems, working alongside architects, designers and verification engineers to deliver high-quality, industry-leading graphics technology. You'll contribute to complex verification environments, solve challenging technical problems and help drive continuous improvements to our verification methodologies and flows.
Responsibilities:
Develop and execute verification plans for advanced GPU components and subsystems.
Develop and maintain AI tools, agents, and skills to support our engineering teams and workflows.
Build, maintain and enhance robust verification environments using SystemVerilog and UVM.
Apply coverage-driven, constrained-random and, where appropriate, formal verification techniques to achieve comprehensive functional coverage.
Debug complex functional issues and work closely with Design and Architecture teams to identify and resolve root causes.
Contribute to block-level and system-level verification, including environment integration and regression analysis.
Improve verification methodologies, automation, scripting and continuous integration flows to increase quality and efficiency.
Participate in verification reviews and support verification sign-off activities.
Share technical knowledge and collaborate with colleagues across the wider GPU engineering organisation.

Required RF/HW & System Validation Engineer
Scope:
As an RF/HW Validation Engineer, you will bridge the gap between HW/RF validation and complex system-level testing. You will design, develop, and execute automated and manual test plans to verify the performance, reliability, and compliance of our SDR (Software Defined Radio) architectures and multi-layered tactical systems (including integration with other systems).
Key Responsibilities:
System-Level Testing: Execute end-to-end system testing of counter-drone platforms, verifying the integration of RF hardware, firmware, and complex software-defined radio algorithms under real-world scenarios.
Hardware Product Testing: Test and validate various HW products, including antennas, radar systems, jammers, and related peripherals.
Failure Analysis & Troubleshooting: Debug complex RF anomalies, signal integrity issues, and system bugs down to the component/board level, working closely with RF Design, Board Design, and SW teams.
Documentation: Create comprehensive test plans (ATP/DTP), write test reports, and present data-driven analysis to cross-functional R&D teams to impact the next generation of hardware.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and verification. You should have real passion for methodologies and automation solutions that enable SOC creation in the most optimized way.

In this position, you will get the opportunity to build complex networking chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.


What you'll be doing:

Implement chip level design through collaboration with cross-functional teams (Functional Design, DFT, Design Verification, System Verification, STA, and Physical Design).

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, emulation, resolve design quality issues.

Daily work involves aspects of chip level design, including partitioning, CDC, RDC, trial synthesis, design quality checks.

Taking part in flows development and deployment.

We are looking for an exceptional hands-on leader with strong technical expertise, proven experience leading VLSI Front-End Design engineers, and a track record of delivering complex, state-of-the-art products on time and in production ready quality.

The ideal candidate is execution-driven, innovative, and passionate about building high-performing team and cutting-edge AI technology.

Responsibilities

Manage and lead a team of Front-End Design engineers.

Be accountable for the teams development lifecycle, including architecture, development, validation, and release, focusing on meeting PPAA targets.

Lead development of advanced VLSI IPs for AI processors, DSP and HW accelerators while continuing pushing the VLSI design methodologies, procedures, sign off and AI tools assimilation to its next level.

Support system bring-up, debugging, and customer-facing activities when needed

We are looking for a CAD/Emulation Graduate Engineer to join our infrastructure team. This position is designed as an entry-level role for a recent graduate, providing hands-on experience with advanced VLSI CAD/Emulation and infrastructure



Key Responsibilities

Develop and maintain automation scripts for front-end Emulation and VLSI CAD flows and automation.

Support execution and releases of VLSI artifacts while marinating advanced CAD flows.

Assist in improving infrastructure efficiency and tool integration.

Work with version control systems and CI/CD pipelines for regression and build environments.

Own and rule top notch emulation methodologies and procedures.