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23/06/2026
חברה חסויה
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Chip Design Manager to join our Networking team! As a Chip Design Manager in our Networking Business Unit, you will lead a team of highly skilled engineers responsible for verifying the next generation of our cutting-edge network products and GPU technologies. This is a unique opportunity to make a real impact at the heart of our AI and HPC revolution, while working in a fast-paced, innovative environment. You will join a passionate, experienced team working at the forefront of silicon verification - using advanced methodologies and tools to ensure design correctness for world-class solutions in data centers, high-performance computing, networking, and storage.

What You'll Be Doing:

Lead and grow a team of formal verification engineers focused on pre-silicon FV of complex digital designs.

Define and drive strategies and methodologies across multiple projects to prove design correctness and ensure quality.

Collaborate closely with Architecture, Design, and DV teams to identify verification needs and drive closure.

Provide technical guidance, mentoring, and support to engineers on the team.

Own planning and execution of verification deliverables to ensure high quality and timely tapeouts.
Requirements:
What We Need to See:

BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.

5+ years of managerial experience leading engineering teams in chip design or verification.

8+ years of industry experience in RTL design, functional verification, or related domains.

Strong understanding of chip design flows and verification methodologies.

Excellent leadership, analytical, problem-solving, and communication skills.


Ways to Stand Out from the Crowd:

Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal).

Background in assertions, coverage models, or formal testbench development.

Track record of building and scaling high-performing engineering teams.

A passion for recruiting, mentoring, and developing talent.
This position is open to all candidates.
 
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21/06/2026
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for a Chip Design Manager to join our Networking team! As a Chip Design Manager in our Networking Business Unit, you will lead a team of highly skilled engineers responsible for verifying the next generation of our cutting-edge network products and GPU technologies. This is a unique opportunity to make a real impact at the heart of our AI and HPC revolution, while working in a fast-paced, innovative environment. You will join a passionate, experienced team working at the forefront of silicon verification - using advanced methodologies and tools to ensure design correctness for world-class solutions in data centers, high-performance computing, networking, and storage.

What You'll Be Doing:

Lead and grow a team of formal verification engineers focused on pre-silicon FV of complex digital designs.

Define and drive strategies and methodologies across multiple projects to prove design correctness and ensure quality.

Collaborate closely with Architecture, Design, and DV teams to identify verification needs and drive closure.

Provide technical guidance, mentoring, and support to engineers on the team.

Own planning and execution of verification deliverables to ensure high quality and timely tapeouts.
Requirements:
What We Need to See:

BSc or MSc in Electrical/Computer Engineering, Computer Science, or Mathematics.

5+ years of managerial experience leading engineering teams in chip design or verification.

8+ years of industry experience in RTL design, functional verification, or related domains.

Strong understanding of chip design flows and verification methodologies.

Excellent leadership, analytical, problem-solving, and communication skills.


Ways to Stand Out from the Crowd:

Experience with formal verification tools and methodologies (e.g., JasperGold, VC Formal).

Background in assertions, coverage models, or formal testbench development.

Track record of building and scaling high-performing engineering teams.

A passion for recruiting, mentoring, and developing talent.
This position is open to all candidates.
 
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23/06/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking Switch technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our Switch team delivers world class Bridge and router solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver smart and high bandwidth multi port switches. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.
Requirements:
What we need to see:

BSc in Electrical/Computer Engineering or MSc in Mathematics.

Excellent analytical, logical reasoning and problem-solving skills.

Strong debugging and analytical skills.

Strong communication and interpersonal skills are required.


Ways to stand out from the crowd:

Formal verification work experience.

Knowledge of digital logic.
This position is open to all candidates.
 
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23/06/2026
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for a Formal Verification Engineer for our NVIDIA Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. NVIDIA has the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:
In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of NVIDIA's core technology.
Learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.
Requirements:
What we need to see:
BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.
1-3 years of relevant experience.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.

Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.
This position is open to all candidates.
 
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23/06/2026
חברה חסויה
Location: Yokne`am
Job Type: Full Time
We are looking for a Formal Verification Engineer for our Networking team!

This is an exciting opportunity to join a hardworking Pre-Silicon design and verification team, working on groundbreaking NIC technologies. We deploy state-of-the art formal verification tools and methodologies to prove design correctness. Working in our formal verification team will expose you to a wide range of cutting edge design and technologies. Our NIC team delivers world class CPU interface and offload solutions for HPC, data-center, network, and storage markets. We micro-architect, verify, and deliver the best and most widely used high BW ethernet and IB NICs in the industry. We have the most sophisticated formal tools and methodologies in the industry, which help us achieve A0 design tapeouts. As part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.

What you'll be doing:

In this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.

You will work on ambitious designs along with our Pre-Silicon team and take part in developing the next generation of our core technology.

Learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.
Requirements:
What we need to see:

BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.

1-3 years of relevant experience.

Excellent analytical, logical reasoning and problem-solving skills.

Strong debugging and analytical skills.

Strong communication and interpersonal skills are required.


Ways to stand out from the crowd:

Formal verification work experience.

Knowledge of digital logic.
This position is open to all candidates.
 
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23/06/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a passionate and experienced software developer to join our Chip Design Technologies group, helping to build the tools that shape the future of Chip Design and Verification. This role is at the intersection of software engineering and hardware design. Youll work on the software that accelerates the development of our industry-leading networking chips - highway for the AI revolution.

We're looking for someone who combines strong coding skills with preferably a solid understanding of chip design or verification. If youre excited about solving technical bottlenecks, building scalable tools, and collaborating with designers and verification experts, youll feel right at home here.

What youll be doing:

Develop software tools for our chip design and verification flows

Collaborate closely with designers and verification engineers to identify bottlenecks, propose improvements, and build software solutions that boost productivity and quality.

Own your solutions end-to-end - from idea to delivery to support.
Requirements:
What we need to see:

B.Sc. or M.Sc. in Computer Science, Computer Engineering, or Electrical Engineering.

Total of 5+ years of experience developing software tools for chip design/verification.

Proficiency in software engineering, with strong debugging and system design skills.

Strong communication skills and a proactive approach to working with users and cross-functional teams.


Ways to stand out from the crowd:

2+ years of hands-on experience in chip design or verification.

Proven ability to identify quality or efficiency gaps in design/verification workflows and deliver impactful methodology or automation improvements.

Experience in leading or contributing to cross-team technical discussions to define software solutions.

Passion for building usable tools, with deep understanding of user needs, pain points, and design/verification/debug scenarios.

Proficiency in Python.
This position is open to all candidates.
 
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21/06/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing full-chip physical design methodologies, Physical Verification development and support through all the projects, Tapeout activities for implementation of networking chips and SOCs.

Work closely with Full Chip Layout owners and block owners, project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art FCL physical design problems that are needed for our chips.

We expect you to run, debug, and approve Physical Verification flows across multiple projects, ensuring strict adherence to our high standards.

Participating and developing flow and tool methodologies for fullchip, physical design verification across multiple projects.
Requirements:
What we need to see:

B.SC./ M.SC. in Electrical Engineering/Computer Engineering (or equivalent experience).

You should have at least 5+ years of hands-on Full-chip layout and Physical Verification experience, demonstrating your proven expertise.

A strong background in Physical Verification methodology, including DRC / LVS / ANT / ERC / DFM in advanced process nodes is necessary.

Proficiency using Python, Tcl, Shell, Make scripting.

Experience in Linux environments.

AI tools orientation or alternatively a desire to learn.

Familiarity with physical build EDA tools, including Synopsys (ICC2/FC) and Cadence (Innovus).

Familiarity with Physical Verification tools: Synopsys (ICV), Siemens (Calibre)

Self-motivation, attention to detail, and good interpersonal skills.


Ways to stand out from the crowd:

Experience with data collection and analysis

Experience in methodology definition / flow owner of Full-chip / Place and Route

Great teammate.

Ownership, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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24/06/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Formal Verification Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the formal verification strategy for chips that power the world's largest AI clusters.
As the Formal Verification Engineer, you will be a foundational member of our Israel R&D center. You wont just execute tasks; you will define the Formal verification strategy for chips that drive the worlds largest AI clusters. You will dive deep into the technical details, proving the correctness of complex designs and ensuring they flawlessly meet specifications.
Key Responsibilities
Own and develop formal verification environments from scratch through to sign-off
Apply formal verification methodologies and strategies to prove the correctness of intricate designs
Work closely with the Architecture, Design, and DV teams to identify verification needs and pinpoint design requirements
Create robust formal environments, analyze complex RTL designs, and apply advanced formal techniques to find corner-case bugs
Analyze verification results, identify failures, and collaborate directly with designers to resolve issues efficiently
Architect and develop generic, common formal functions and properties to be reused across multiple projects.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering or a related technical field
4+ years of hands-on experience in Formal Verification within semiconductor companies
Deep expertise in formal verification methodologies, tools, and flows
Strong understanding of RTL design and verification principles
Experience with industry-standard formal verification tools (Jasper, VC Formal, or similar)
Excellent communication skills, strong analytical thinking, and a proactive, "can-do" approach to problem-solving
Preferred Qualifications
Track record of successfully taking complex blocks or subsystems through the entire formal verification lifecycle
Experience with SystemVerilog UVM-based design verification
Knowledge of networking standards (Ethernet, NVLink, UALink, PCIe)
Background in high-speed serial interface verification.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required AI SoC Design Verification Engineer, Cloud

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining what’s possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. 
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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21/06/2026
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for a Director from the FE ASIC domain to lead the Design Technology team. The team is responsible for driving AI-powered engineering productivity and developing, supporting, and operating the systems, tools, infrastructure, and automation solutions that enable the work of the design and verification teams in the networking ASIC group. A key objective is to maximize engineering productivity, design quality, and execution efficiency by accelerating the adoption of AI-assisted workflows, scalable automation, and advanced design technologies, while continuously evolving engineering tools and flows to meet the rapidly changing needs of AI-driven development. This position offers the opportunity to think outside the box and make a real impact on a dynamic, technology-focused company.

What You'll Be Doing:

Lead managers and team leads.

Collaborate with project leaders to define strategy, priorities, and execution plans across strategic programs.

Drive the development, deployment, operation, and adoption of design technologies, engineering infrastructure, automation, and AI-enabled solutions that improve chip design productivity, quality, and execution efficiency.

Evolve engineering tools, environments, and workflows to meet the changing needs of AI-driven development and design engineering.

Ensure high-quality support and enablement for internal engineering users through training, documentation, troubleshooting, and continuous service improvement.

Partner with methodology and engineering stakeholders to drive adoption and continuous improvement of design and verification flows.
Requirements:
What We Need to See:

Excellent management skills, quick learner, highly motivated, and customer-oriented.

15+ overall years of experience in chip design. Experience in CAD, design infrastructure, engineering productivity, automation, or AI-driven development environments is an advantage.

4+ years as a 2nd-line manager, leading managers and driving execution across multiple teams.

Experience driving organizational adoption of new technologies, automation, and AI-based engineering solutions.


Ways to Stand Out from the Crowd:

Broad system-level understanding of modern chip design and verification flows.

10+ years of proven experience in Front-End chip design, CAD, design infrastructure, or engineering productivity.

Passion for innovation, AI-driven engineering productivity, quality, efficiency, and flow automation.

Demonstrated success leading large-scale engineering transformation initiatives, technology adoption programs, and AI enablement initiatives.
This position is open to all candidates.
 
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21/06/2026
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an experienced Design Engineer to join the YU design team and develop the next generation technologies.

As a design engineer in the YU design team, you will participate in definition and implementation of our boot and chiplet control technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.

What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated boot components into various projects and using state-of-the-art technologies.
As a member of our YU design team, you will participate in defining various boot and chip controller features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
What we need to see:
B.SC./ M.SC. in Computer Engineering/Electrical. Engineering/Communication Engineering.
5+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
High Level of English.

Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Knowledge in Mixed Signals, Analog, and Behavioral Models for Verification.
Knowledge in Chip boot and Infrastructures.
Experience in working with back-end on area, power and timing closures.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8703701
סגור
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