דרושים » תוכנה » Lead SoC Architect

About the group:
We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

We are a highly experienced architecture group specializing in switch processing, with deep expertise in both hardware and software architecture in the high-speed networking domain.
Our innovative packet processors power some of the most advanced data centers in the world and are designed into tier-1 vendor platforms. With state-of-the-art technology, a strong track record of industry recognition, and multiple award-winning achievements, we continuously push the boundaries of performance and scalability.
Our group is involved across the entire development lifecycle - from early research and architectural definition to silicon production - working on both research initiatives and production-grade products.
our Impact
As HW Architect Team Leader, you will combine deep technical leadership with people leadership. You will shape next-generation networking silicon while building and mentoring a strong architecture team.
What Youll Be Doing
Lead, manage, and mentor a team of HW architects, fostering technical excellence and innovation.
Drive research, evaluation, and architectural definition of next-generation SoCs - from product requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet and NIC switches.
Lead system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate cross-functionally with design, verification, modeling, software, and other architecture teams to ensure end-to-end system alignment.
Identify and evaluate new technologies, methodologies, and architectural approaches for future products.
Provide technical direction, make key architectural trade-offs, and ensure execution excellence.

we provide modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. as a senior hw  system architect, your role will be to work closely with our oem partners and realize a successful integration of the adas to self-driving technology in these platforms. ** this role requires working from our jerusalem site at least 1 day per week. it also offers the flexibility to work part-time from our other sites, subject to seat availability. what will your job look like?
lead end-to-end life cycle of the system architecture - from analyzing oems (customers) technical requirements to hw architecture definition, development and verification to ensure integration of our products into the vehicle platform.
work in close collaboration with various groups including algo, hw design, verification, sw architect, mechanics, and simulations.
provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
provide practical system architecture definition to board designers and sw/algo by managing system external interconnects and internal interfaces, SOC, mcu, definitions and optimization (based on oems requirements and other constraints)

we provide modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. as a senior hw  system architect, your role will be to work closely with our oem partners and realize a successful integration of the adas to self-driving technology in these platforms what will your job look like?
lead end-to-end life cycle of the system architecture - from analyzing oems (customers) technical requirements to hw architecture definition, development and verification to ensure integration of our products into the vehicle platform.
work in close collaboration with various groups including algo, hw design, verification, sw architect, mechanics, and simulations.
provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
provide practical system architecture definition to board designers and sw/algo by managing system external interconnects and internal interfaces, SOC, mcu, definitions and optimization (based on oems requirements and other constraints)

we are looking for a chip design micro architect for the networking silicon group.as a chip micro architect at our company networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art bluefield dpu SOC and/or connectx nic that deliver breakthrough networking, security, cloud, ai and Storage performance to the ai data centers. as a design micro architect, you will make a real impact in a dynamic, technology-focused ai company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!
what you'll be doing:
you will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption
break high-level arch requirements into lower-level design building blocks. focal point for the design team, reviewing implementation and guiding the team.
find bottlenecks early in the development cycle using performance analysis and simulations
use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues

We provide modular automotive systems that transform mobility by bringing cutting-edge, safe-by-design self-driving technology and a complete, modular solution with flexible business models to the market. as a senior hw  system architect, your role will be to work closely with our oem partners and realize a successful integration of the adas to self-driving technology in these platforms. this role requires working from our jerusalem site at least 1 day per week. it also offers the flexibility to work part-time from our other sites, subject to seat availability.
what will your job look like?
lead end-to-end life cycle of the system architecture - from analyzing oems (customers) technical requirements to hw architecture definition, development and verification to ensure integration of our products into the vehicle platform.
work in close collaboration with various groups including algo, hw design, verification, sw architect, mechanics, and simulations.
provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
provide practical system architecture definition to board designers and sw/algo by managing system external interconnects and internal interfaces, SOC, mcu, definitions and optimization (based on oems requirements and other constraints).

about the job
be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. you'll contribute to the innovation behind products loved by millions worldwide. your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
as part of our server chip design team, you will use your asic design experience to be part of a team that creates the SOC vlsi design cycle from start to finish. you will collaborate closely with design and Verification engineers in active projects, creating architecture definitions with rtl coding, and running block level simulations.in this role, you will contribute in all phases of application-specific integrated circuit (asic) designs from design specification to production. you will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SOC /rtl. you will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.the ml, systems, & cloud ai (msca) organization at our company designs, implements, and manages the hardware, software, Machine Learning, and systems infrastructure for all our company services (search, youtube, etc.) and our company cloud. our end users, cloud customers and the billions of people who use our company services around the world. we prioritize security, efficiency, and reliability across everything we do - from developing our latest tpus to running a global network, while driving towards shaping the future of hyperscale computing. our global impact spans software and hardware, including our company clouds vertex ai, the leading ai platform for bringing gemini models to enterprise customers.
responsibilities
define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
perform rtl development (e.g., coding and debug in verilog, systemverilog, vhdl), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power, and fpga/silicon bring-up.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.

We are looking for a Senior RT Embedded Engineer to join our design and development team, responsible for the full-cycle development of an innovative 4D imaging radar for the automotive sector. You will take a lead role in design and implementation of real-time software for a multi-core automotive SoC platform, consisting of embedded cores, DSPs and dedicated accelerators.
What will you do?
Be part of full-cycle development of embedded SW for innovative automotive radars
Take a lead role in embedded system SW design and implementation on the industrys cutting-edge embedded SoC
Integrate the teams SW over the real-time embedded controller. Bring SW to validation readiness to the validation team. Bring SW to the test vehicles
Specify and balance system-SW requirements to achieve the run time restrictions of the compute platform
Work in collaboration with the CTO and Algorithms team

we're the driving team behind groundbreaking innovations, empowering the development of our cutting-edge ai models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. from software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our tpus, vertex ai for google cloud, google global networking, data center operations, systems research, and much more.
responsibilities
define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
perform rtl development (e.g., coding and debug in verilog, systemverilog, vhsic hardware description language (vhdl)), function/performance simulation debug, and lint/cdc/fv/upf checks.
participate in synthesis, timing/power, and fpga/silicon bring-up.
participate in TEST plan and coverage analysis of the block and SOC -level verification.
communicate and work with multi-disciplined and multi-site teams.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.