דרושים » הנדסה » ic post-silicon TEST engineer

we are hiring a skilled senior dpu performance Validation engineer for our dpu product lines. this includes chip architecture performance characterization, debug, and validation across single-die and multi-die systems. working in the network silicon engineering group, you will be responsible for debugging, analyzing, and validating performance and functional behavior of current and future silicon devices. you will collaborate with chip design, verification, fw, and architecture teams to ensure successful product development with bold product cycles. the qualified candidate should be comfortable working in simulation and emulation environments, with strong skills in rtl-level debug, waveform analysis, and system -level performance root cause analysis.
what you will be doing:
learn and analyze system -level operation of dpus
debug and root-cause performance issues in pre-silicon environments, across rtl, waveform traces, and multi-die system simulations.
collaborate closely with design, verification, architecture, and performance modeling teams to isolate and fix issues.
develop and improve validation methodologies for performance experiments and data collection.
automate repetitive debug and validation tasks to scale coverage and efficiency.

we are looking for an experienced dft engineer to join an exceptional team of dft experts to develop the next generation dft technologies.
as a dft engineer at the networking group at our company, you will participate in definition and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and sophisticated products, our dft solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for defining, coding and integrating sophisticated dft components into various projects and using state-of-the-art technologies.
as a member of our dft design team, you will participate in defining various dft features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.

we seek a V&V Engineer with a strong background in validation to join the interconnect validation team. this position will be part of the product engineering team that crafts and integrates software tests for our company networking products into the production lines. you will handle various projects across teams, complete new lab setups, review the hw design, build validation plans, implement automated tests, perform manual scenarios, and report bugs. are you passionate about attention to detail and taking ownership of end-to-end validation for our interconnect products? join our team and bring your expertise to life!
what you'll be doing:
collaborate with multi-functional teams across engineering, software development, and hw to identify TEST requirements
define and build setup topologies for appropriate product coverage
build a validation plan, complete, and integrate tests for the new interconnect products to address the business needs
debug sw & hw failures during the validation and take action to address it
report bugs found during validation, assist with reproduction, and debug to understand the root cause, and follow up to close it
deploy the product validation into the nightly automation tests and track during the daily meeting

seeking a highly motivated and hardworking software engineer with hands-on capability technical experience, to verify the design and implementation of the next generation data processing unit software, with wide range of features related to Cyber security and Embedded systems. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. at nvidia, we're united in our quest to transform the way smart adapters are used.
what you'll be doing:
collaboration & communication: work closely with software, architecture, product and DevOps teams to define TEST requirements, coordinate releases, and ensure high-quality product delivery.
end-to-end feature ownership: deep dive into feature sets, taking responsibility from TEST plan development to final implementation and full automation
develop and automate testing: design, implement, and maintain automated TEST scripts and frameworks (primarily in Python ) to verify the correct functionality of our software products
system & integration validation: validate software functionality and performance through system -level and integration testing, utilizing Linux -based environments and virtualization tools.
defect analysis: analyze TEST results, open bugs and track issues to closure, ensuring robust and scalable solutions.
continuous improvement: drive design verification flows, contribute to methodology improvements, and leverage planning/tracking systems to manage release progress and build release indicators.
TEST environment management: set up, maintain, and optimize TEST environments using Linux, docker, virtual machines, and other modern tools.
regression monitoring: operate, monitor, and analyze failures in the nightly regression system, providing methodical root-cause analysis across hardware, os, and software layers.

We are looking for a Senior networking test engineer with strong system‑level debugging skills to join our End‑to‑End Verification team. You will work on cutting‑edge Ethernet‑based AI clusters, owning complex issues across hardware, system software and AI workloads. NVIDIA is widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

What youll be doing:

Design and review test and product requirements across the Ethernet / NIC / DPU / Switch portfolio, focusing on large‑scale AI cluster behavior.

Build and maintain realistic customer‑like testbeds, including heterogeneous hardware, OS / driver combinations and complex network fabrics.

Own end‑to‑end cluster troubleshooting: reproduce customer scenarios, triage across the stack and drive issues to root cause and fix.

Read and understand relevant source code to identify defects, validate fixes and improve logging and instrumentation.

Collaborate closely with development teams to debug NCCL, RoCE/RDMA and related networking components using logs, code inspection and targeted experiments.

Define tests and guide the automation team to implement robust suites that produce actionable logs, metrics and traces.

Run Regression, Performance, Functional and Scale testing, analyze results and provide clear, data‑driven reports to stakeholders.

Profile and benchmark deep learning training and inference workloads, correlating model‑level metrics with system and network telemetry to uncover bottlenecks.

We are looking for a Senior networking test engineer with strong system‑level debugging skills to join our End‑to‑End Verification team. You will work on cutting‑edge Ethernet‑based AI clusters, owning complex issues across hardware, system software and AI workloads. We are widely considered to be one of the technology worlds most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you!

What youll be doing:

Design and review test and product requirements across the Ethernet / NIC / DPU / Switch portfolio, focusing on large‑scale AI cluster behavior.

Build and maintain realistic customer‑like testbeds, including heterogeneous hardware, OS / driver combinations and complex network fabrics.

Own end‑to‑end cluster troubleshooting: reproduce customer scenarios, triage across the stack and drive issues to root cause and fix.

Read and understand relevant source code to identify defects, validate fixes and improve logging and instrumentation.

Collaborate closely with development teams to debug NCCL, RoCE/RDMA and related networking components using logs, code inspection and targeted experiments.

Define tests and guide the automation team to implement robust suites that produce actionable logs, metrics and traces.

Run Regression, Performance, Functional and Scale testing, analyze results and provide clear, data‑driven reports to stakeholders.

Profile and benchmark deep learning training and inference workloads, correlating model‑level metrics with system and network telemetry to uncover bottlenecks.

we are looking for a creative and independent senior TEST engineer. nvidia networking unit has continuously reinvented itself over two decades. our high-speed buses & network products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. today, nvidia is increasingly known as the place for getting end-to-end high-speed ethernet and infiniband solutions we're looking to grow our company and build our teams with people who can join us at the forefront of technological advancement. we need a creative individual who will help transfer network silicon ics products (switch, nic, smartnic) from design engineering to mass production.
you will be exposed to various aspects of design, dft and TEST of nvidia network ic products, and will be responsible for definition and development of tests from wafer level to final TEST of network-ics. in addition, your responsibilities will include working with overseas manufacturing teams to increase yields, TEST coverage and capacity, and reduce production costs. if you are passionate about enabling of the highest quality network products that will change the world, we want to hear from you!
what you'll be doing:
ic TEST definition & development
write, execute and debug fw code
manage failure analysis of field and production failures
provide dft recommendations to the design teams
build expertise on production of network products

We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies.

What youll be doing:

Enabling new SerDes and Optical Technologies.

Implement FW functionality in signal processing units of our products.

Work closely with the architecture, HW, and SW design teams.

Define implement and maintain FW algorithm to control the Silicon.

Develop and test FW on emulation & simulation environments during the Pre-silicon phase.

Debug and screen HW/FW/SW issues.

Take an active part in silicon bring-up and SW development phases.

Lead data-driven discussions about the product functionality and areas for improvement.

Our System Product Engineering (SPE) organization is looking for a Security Software Engineer to join the TDE (Test Development Engineering) Security Team. This role focuses on designing, developing, and deploying security-critical software that protects our next-generation products throughout development, validation, and production. You will work on the most sensitive and business-critical portions of the SPE delivery and production pipelines, taking ownership of production-line security and collaborating closely with DFT, architecture, test development, and validation teams to ensure security is built in end-to-end.

What youll be doing:

Design and develop security-critical backend services, libraries, and tooling that protect SPE systems, validation flows, and production delivery pipelines.

Own and implement production-line security mechanisms, ensuring secure bring-up, test, validation, and manufacturing handoff.

Develop and integrate security features such as authentication, attestation, secrets and key management, integrity checks, and audit mechanisms.

Build secure automation frameworks and tooling embedded into test execution, validation, and manufacturing workflows.

Collaborate closely with DFT (Design for Test), Architecture, test writers, and validation teams to define security requirements and translate them into robust, scalable software solutions.

Participate in secure design reviews, threat modeling, security features for SPE board components and production flows.

Improve the security posture, reliability, observability, and maintainability of SPE systems and services.

Support and influence secure CI/CD and release pipelines, including vulnerability detection, policy enforcement, and controlled deployments.

Investigate, debug, and remediate security vulnerabilities and systemic weaknesses across SPE systems spanning development through production.

we are looking for a dft Verification engineer for developing the next generation dft technologies.
as a dft Verification engineer at our company, you will verify the design and implementation of our dft technologies in various projects. this position offers the opportunity to have real impact in a dynamic, technology-focused company impacting switches, nic and SOC product lines. we are working closely with a wide range of aspects - chip design, backend, verification and production testing. we are working on the most advanced technologies and complex products. our dft solutions are unique, innovative, and we are continuously looking for new and creative solutions to meet the challenging goals.
what you'll be doing:
in this position, you will be responsible for verification of the dft design, architecture and micro-architecture using sophisticated verification methodologies.
as a member of our dft verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (testbenches, bfms, checkers, monitors), execute TEST /coverage plans, and verify the correctness of the design.
collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.