דרושים » הנדסה » ‏VTA Engineer (Railway systems)‏

At our company, we understand transport networks and what moves people. From high-speed trains, metros, monorails, and trams, to turnkey systems, services, infrastructure, signalling and digital mobility, we offer our diverse customers the broadest portfolio in the industry. Every day, more than 80 000 colleagues lead the way to greener and smarter mobility worldwide, connecting cities as we reduce carbon and replace cars.
PURPOSE OF THE JOB:
As a Power Supply Automation Engineer, you will be responsible for both basic and detailed design within the Substation Automation scope and the emergency cut-off system of railway transportation infrastructure electrical power stations. This includes systems for traction, intake, and distribution substations, focusing on remote control and monitoring, substation-level communication, and interface with SCADA and other systems. You will implement the latest standards and technologies, such as: IEC 61850 client-server communications, GOOSE messaging, Fiber optic networks, IEC 104 and OPC UA communication protocols when required by the project. Additionally, you will coordinate with Cyber Security experts and ensure the implementation of a cyber-security compliant solution tailored to the project's needs.
MAIN RESPONSABILITIES :
Key Accountabilities:
Prepare and execute testing activities
in support to one or several Projects on railway Power supply Automation systems under the direction of his / her hierarchy
according to the testing procedure / documentation and following POS T&C Leader and / or PrCOM instructions
Ensure defects identification and correction (trouble shooting)
In the event of a non-conformity observed during the commissioning phase, make a return experience (REX) towards the project, and ensure that all design related issues are correctly reported in the adequate tools, including the defect description and associated test context
Ensure follow-up of detected issues and deliver the commissioning reports.
Check that the test tools are in perfect working order and calibrated.
Support V&V team and perform test in lab as per request
Deliver the committed performance in terms of Quality, Costs and Deadlines and in compliance with our company policies, local standards and regulations (in particular EHS and Railway Safety)
Prepare SAT, and site test procedures; execute tests and manage punch lists.
validate PLC/HMI logic and SCADA integration.
Support live energization and troubleshoot issues.
Maintain automation configuration and ensure QCD and DFQ compliance.

At our company, we understand transport networks and what moves people. From high-speed trains, metros, monorails, and trams, to turnkey systems, services, infrastructure, signalling and digital mobility, we offer our diverse customers the broadest portfolio in the industry. Every day, more than 80 000 colleagues lead the way to greener and smarter mobility worldwide, connecting cities as we reduce carbon and replace cars.
Main Responsabilities
Key accountabilities
Implementation of the necessary organization of one work front to enable the delivery, erection, installation works achievement in the optimal conditions: performances, costs, quality and health and safety.
The POS Installation Supervisor reports directly to the POS Installation Manager and is in charge of making sure that the power supply equipment is installed in conformity with the Basic and Detail Designs, the installation procedures, the Quality Assurance / Quality Control (QA/QC) system and the Time Schedule in place.
Its duties include also the necessity to report on all technical Issue: with the Engineering Manager and its Installation Manager about Detail Design concerns and with the procurement teams and its Installation Manager about Non-Conformities Reports (NCR) on equipment / material.
The POS Installation Supervisor had to prepare the 4M process before starting activities and had to submit it to the Installation Manager for starting GO decision.
During the Installation, the POS Installation Supervisor is required to organize the tasks, in a competent and consistent way, so that all key activities are properly controlled. He will coordinate with other contractors site teams.
The POS Installation Supervisor will manage and control the Subcontractors technical performance as per their subcontracting obligations.
The POS Installation Supervisor collects and signs the teams reports - Daily / Weekly -
Its duties include also to coordinate with OPC and other third parties on Site.
The POS Installation Supervisor is responsible of the teams & subcontractors works in compliance with our company EHS and local rules.
Its duties include the follow up of the service of the machine and maintain the highest level of availability.
The POS Installation Supervisor alerts and reports to the management on any concerns he has related to the job he has to perform, and especially regarding: EHS, Quality, Access, etc.
The POS Installation Supervisor is responsible for the onsite Quality Plan & EHS Plan implementation.
Delivery
Daily / Weekly progress report
Weekly Quality report based on the NCR analysis and the Quality controls reports
Weekly Hourly report of his Construction team.
Warehouse request
Analysis of the equipment or material consumption.
Report of the service of machines & tools
The POS Installation Supervisor must be based on-shore, on site, typically in the Project Leading Unit.
Performance measurements
Weekly works progress program control and associated reports.
Client complaints follow-up (non-conformity forms)
Quality Control indicators (Time to close NCR - OTD reception document)
On Time Delivery (OTD) Installation milestones
EHS indicators.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
As a Design Team Manager within the Server Chip Design team, you will oversee the IP and SoC VLSI design cycle from architecture to production. In this role, you will own and manage IP, subsystems and SoC development, leading a group of designers and design tech leads.
You will be responsible for mentoring and developing team members and tech leads while driving improvements in leadership, technical execution, and design flows.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Manage a team of tech leads and designers. Develop and mentor team members, and communicate and co-work with multi-disciplined and multi-site teams.
Lead design activities at IPs, subsystems, and SoC.
Plan, execute, track progress, assure quality, and report status of the assigned activity.
Work closely with internal customers and support multiple activities and deliverables.
Assure and manage deliverables quality at all RTL design categories including reviews, static checks, design for physical design, power, etc.

At our company, we're working to be the most customer-centric company on earth. To get there, we need exceptionally talented, bright, and driven people. If you'd like to help us build the place to find and buy anything online, this is your chance to make history.
The Global Services team is looking for exceptional individuals to join our Controls team as Controls Engineer, responsible for the building automation systems within our company. If you are passionate about the Customer Experience, think and act globally and have the ability to contribute to major new innovations in the area of building controls and automation this is the challenge you are looking for!
The ideal candidate will possess a /construction management, mechanical, electrical or technology background that enables him/her to undertake the challenges of sophisticated controls platforms and a demonstrated ability to think broadly and strategically in aligning building controls and automation with the larger objectives of the business.
Role Responsibilities and Requirements:
- Understanding of: electrical diagrams, control diagrams, building operations, control circuits, industrial HVAC.
- Ability to ascertain customer needs to help develop scope and specifications.
- Ability to manage scope of work relative to the site specifics and customer needs.
- Ability to manage engineering to determine the scope of work relative to the design intent of the customer needs.
- Ability to read and interpret specifications and implementing those specifications as they apply the work environment.
- Development of control panel BOMs.
- Development of ISA sheets for temperature, level, flow, and pressure transmitters along with ISA sheets for control valves, positioners, analytical, and various other types of instrumentation.
- Development of drawings for control panels, power distribution, junction boxes. Included in the drawings are the general arrangement, internal layout, schematics and interconnection and wire diagrams.
- Development of logic diagrams in the International Automation format for complex logic devices such as Programmable Logical Controller and Distributed Control System.
- Preparation of cable, routing plans and schedules.
- Performing inspects, testing, and commission of the facility systems.
- Work individually and as part of a team to develop new products, support existing products, test and evaluate equipment.
- Provide technical assistance as needed to internal customers.
- Coordinate work internally within the department and externally with other departments to ensure on-time completion of projects within budget.
- Manage service contracts with various vendors.
- Must be business proficient in English.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a research and development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.

We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a research and development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs, collaborate with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with strategic value add (SVA) and industry-leading formal tools.
Identify and write all types of coverage measures for stimulus and corner cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

our company's custom-designed machines make up one of the largest and most powerful computing infrastructures in the world. The Hardware Testing Engineering team ensures that this cutting-edge equipment is reliable. In the R&D lab, you design test equipment for prototypes of our machinery and develop the protocols used to scale these tests for the entire global team. Working closely with design engineers, you give input on designs to improve our hardware until you're sure it meets our company's standards of quality and reliability.
As a Senior SoC System Test Engineer, you will help to integrate SoC technologies into devices and drive manufacturing test flows to assure performance and screen devices. You will drive yield improvement, cost optimization, and work closely with cross-functional teams to ensure the optimal test coverage in production to ensure high quality SoCs. You will work with various groups to deploy screening methodologies and flows for data processing, analytics, and diagnostics. You will drive the release of cost effective production test solutions into mass production to hit yield and quality goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, qualification strategies, and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Validate test solutions on system-level platforms and prepare for mass production.
Work with hardware and software teams to evaluate functional device yield and performance across various operating conditions.
Develop effective production screens to reduce Defective Parts per Million (DPPM).
Assess test escapees and localize failures, implement containment measures in the manufacturing test flow, and partner with manufacturing, test, quality and reliability teams to identify root cause and implement corrective actions.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use your ASIC design experience to be part of a team that develops the ASIC SoC from Plan of Record (POR) to Production. You will be creating SoC Level micro architecture definitions, Register-Transfer Level (RTL) coding and will do all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies. You will collaborate with members of architecture, software, verification, power, timing, synthesis design for test (dft) etc. You will face technical tests and develop/define design options for performance, power and area.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform RTL development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Participate in architecture feedback.