Requirements:
B.Sc./M.Sc. in Electrical Engineering, Computer Engineering, or a related field from a leading university.
3+ years of hands‑on experience in ASIC design or verification.
Strong knowledge of SystemVerilog and the UVM verification methodology.
Experience with SoC‑level verification is an advantage.
Excellent problem‑solving abilities and strong communication skills.
Proficient in written and spoken English and comfortable collaborating with a global team.

Requirements:
B.Sc. in Electrical/Computer Engineering or equivalent.
5+ years of experience as a VLSI Verification Engineer.
Expertise in System-Verilog and UVM.
Strong software development skills and the ability to develop reusable verification components and utilities.
Strong organizational and planning skills, with the ability to prioritize and drive verification projects to completion.
Effective communicator with a structured, detail-oriented approach to problem-solving and collaboration.
Advantages:
Experience with Git, Python, code templating methods, and open-source verification workflows.
Familiarity with full-chip level aspects of VLSI verification (reset architecture and sequences, power domains and modes, etc.).
Experience in firmware verification, including emulation-based verification on FPGA.
Experience with formal verification or mixed-signal simulation.

Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.
Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.

Requirements:
6+ years of verification experience, including hands-on experience building complex environments from scratch.
Advanced knowledge of verification flow, SOC architecture and design.
Expertise in verification languages such as SystemVerilog, UVM, Spaceman.
Knowledge of industry standard tools, including Verilog, Verilog simulator, and debug.
Clear understanding of constrained random verification process, functional coverage, code coverage, and assertion methodology and philosophy.
Bachelor degree in electrical engineering or computer science, or equivalent experience.

Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
4+ years of experience in RTL verification. Less experienced engineers with high university grades will also be considered
Experience in full and cluster-level verification is an advantage
Self-motivated, ability to work independently and drive tasks to completion
A great teammate with strong communication and interpersonal skills.
Ways to stand out from the crowd:
Knowledge in Specman, Verilog
Knowledge in Networking
Great interpersonal skills.

Requirements:
FPGA Verification engineer (6160) We are seeking a talented and experienced FPGA Verification engineer to join our hardware development team. In this role, you will be responsible for defining and executing comprehensive verification strategies for complex FPGA-based systems, from architectural definition through system integration. You will work closely with FPGA designers, system architects, algorithm teams, and board designers to ensure high-quality and robust designs using advanced verification methodologies and tools. Key Responsibilities Develop and maintain advanced verification environments using SystemVerilog and UVM
Write testbenches, behavioral models, monitors, and scoreboards
Create directed and constrained-random TEST scenarios
Execute simulations, analyze results, and perform in-depth debugging
Define and track functional and code coverage metrics
Collaborate with design engineers to identify and resolve design issues
Support system integration and bring-up activities
Contribute to verification planning and documentation Required Qualifications B.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or related field
5+ years of experience in FPGA/ASIC verification
Strong proficiency in SystemVerilog
Hands-on experience with UVM methodology
Experience with simulation tools such as ModelSim, Questa, VCS, or equivalent
Solid understanding of digital design and FPGA architectures
Strong debugging and problem-solving skills Location: Haifa, Israel

Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.
1-3 years of relevant experience.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.
Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.

Requirements:
BSc in Electrical/Computer Engineering or MSc in Mathematics, or equivalent experience.
1-3 years of relevant experience.
Excellent analytical, logical reasoning and problem-solving skills.
Strong debugging and analytical skills.
Strong communication and interpersonal skills are required.
Ways to stand out from the crowd:
Formal verification work experience.
Knowledge of digital logic.

Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
8 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Experience with associated electronic design automation (EDA) tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog for design.
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
Understanding of register transfer level (RTL) to emulation/field-programmable gate array (FPGA) flows including emulation test benches (e.g., transactors/accelerated verification intellectual properties (VIPs), hybrid, in-circuit emulation).