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משרה בלעדית
לפני 15 שעות
דרושים בReady
Job Type: Full Time
We are seeking RTL Design Engineers to join our team.
Candidates with experience in high-speed SERDES such as PCIe, Aurora, and Ethernet are preferred.
The role involves working on RTL design tasks
Requirements:
2+ year of experience with RTL design
Preferably experience in high-speed SERDES (PCIe, Aurora, Ethernet)
This position is open to all candidates.
 
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דרושים בלוגיקה IT
סוג משרה: מספר סוגים
תנאים נוספים: מספר סוגים
לחברת Medical גלובלית מבוססת ומצליחה אשר משרדיה ממוקמים באזור הצפון, QA Verification engineer.
היקף המשרה: משרה מלאה עד דצמבר 2026, ויש אפשרות קביעות, אך לא ניתן להתחייב לכך בוודאות.
מיקום המשרה: יוקנעם עילית, מחוז צפון.
היברידיות: 100% מהמשרד.
דרישות:
השכלה אקדמאית (לא הנדסאות) במגמת חשמל או אלקטרוניקה או ביו-רפואה או תוכנה או אחר דומה - חובה.
3 שנות ניסיון ומעלה בתפקיד של Verification (לא איכות) מחברת Medical או Pharma בלבד - חובה.
ניסיון תעסוקתי מוכח בביצוע של בדיקות למערכות משולבות תוכנה וחומרה - חובה.
ניסיון תעסוקתי בכתיבה של פרוטוקולי בדיקות ופיתוח - חובה.
שליטה ברמה גבוהה בדיבור, כתיבה וקריאה בשפה האנגלית. המשרה מיועדת לנשים ולגברים כאחד.
 
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2 ימים
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
Our Chip Design group is looking for best-in-class Verification Engineers to join our outstanding Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovative chips, and enjoy working in a meaningful, growing, and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Verification for chip blocks/entities according to specifications under challenging constraints and with high orientation to performance.

Daily work involves acquaintance with all aspects of chip development: Design, Micro- Architecture, Firmware, Production, and Verification.

Engage in cutting-edge PCIe generation working on latest PCIe gen7.
Requirements:
What we need to see:

B.SC./ M.SC. in Computer Engineering/Electrical Engineering/Communication Engineering or equivalent experience.

5+ years of experience in Verification.

High Level of English.

High motivation to grow and excel.

Ways to stand out from the crowd:

Knowledge in PCI Express standard.

Validated experience in Verification or RTL Frontend ASIC Design (Chip Design).

Background in Specman.

Background in RTL uArch & coding.
This position is open to all candidates.
 
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27/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
AWS Utility Computing (UC) provides product innovations - from foundational services such as our companys Simple Storage Service (S3) and our company Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWSs services and features apart in the industry. As a member of the UC organization, youll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for customers who require specialized security solutions for their cloud services.
Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago-even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.
Key job responsibilities
We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards and server integration. As a senior member of our hardware team, you will have the outstanding and meaningful opportunity to participate in the design and execution of all System (controllers, connectivity), High speed (PCIe, Ethernet), board design, layout, testability and manufacturing, production testing and fleet deployment, with the goal of creating and customized platforms that fit within AWS datacenters world leading technology.
As a member of the Machine Learning Acceleration team youll be responsible for the design and optimization of hardware in our data centers. Youll provide leadership in the application of new technologies to large scale server deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and youll work with thought leaders in multiple technology areas. Youll have high standards for yourself and everyone you work with, and youll be constantly looking for ways to improve your products performance, quality and cost. Were changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.
Requirements:
- 5+ years of experience in connector or cable assembly design for high-speed applications.
- Bachelor's degree in Electrical or Mechanical Engineering or related field.
- Hands-on experience with high-speed technologies (e.g., PCIe, Ethernet, Serdes, Switches).
- Strong fundamentals in signal integrity, including channel loss, crosstalk, impedance, and return loss.
- Proficiency in mechanical and electrical CAD tools (e.g., Creo, SolidWorks, Allegro).
- Excellent written and verbal communication skills.
- Ability to work cross functionally with SW team to define and implement diagnostics for hardware validation at component, interface, and system level
- Work with ODMs, component suppliers and internal design teams on cross-boundary triaging, debugging, and resolving issues.
- Hands-on lab equipment skills (VNA, Realtime scope, Sampling scope and its accessories) for electrical validation and characterization.
- Scripting skills to automate tests, logs parsing and data collection.
- Strong technical communication skills (verbal and written) to interface with cross-functional technical leads within and/or outside of the organization.
Preferred Qualifications
- Experience with Server HW designs, Design validation, Production tests and signal integrity of high speed interfaces.
- Knowledge of the product development cycle from concept to mass production.
- Strong analytical capabilities
- The ability to work independently and drive tasks from start to completion
- Experience with server (x86 / ARM) design or architecture.
This position is open to all candidates.
 
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18/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for best-in-class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in verifying our ground-breaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What youll be doing:

Work as a Chip Design Verification Engineer as part of a combined design and verification team that develops front-end design for the Switch silicon GPU and HCA.

Chip level integrations and connectivity.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW. Interaction with organization-wide groups.
Requirements:
What we need to see:

Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate, or equivalent experience.

2+ years of experience in RTL verification.

Self-motivated, ability to work independently and drive tasks to completion.

A team player with good communication and interpersonal skills.

Ways to stand out from the crowd:

Knowledge in Specman, Verilog.

Background in Networking.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will help to develop and maintain emulation infrastructure, tools, and workflow methodologies supporting our Application-Specific Integrated Circuit (ASIC) projects. You will provide emulation infrastructure and methodologies for supporting these projects. You will work with other emulation team members as well as designers, verification engineers, and software teams. You will work with our external vendors, lab support teams, networking and security, and Electronic Design Automation (EDA) tooling and methodology teams to deliver emulation-based prototyping capabilities for our ASIC projects. You will also assist in compiling projects specifying our prototyping platforms, debugging issues in both infrastructure and design, supporting the hardware and lab bring up, and verifying our ASIC systems.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Help in maintaining and upgrading emulation infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation EDA tools, licensing, and job management in our company infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., USB, PCIe, Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
Experience with associated EDA tools, automation, and flow enhancements.
Experience using command debug tools (e.g., Verdi, SimVision/Indago, GDB) and programming in C, C++, Perl, TCL, or Python.
Experience with emulation systems, maintenance, upgrades, and methodology enhancements.
Preferred qualifications:
Master's degree in Computer Science, Electrical Engineering, or a related technical field.
Experience deploying EDA tools into distributed environments.
Experience with system administration, networking, and security systems.
Experience with Register-Transfer Level (RTL) design, Verilog, simulation, System Verilog, and assertions.
This position is open to all candidates.
 
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08/01/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
Work in a combined design and verification team which develops some of the switch silicon core units.
Build reference models, verify and simulate chip blocks/entities according to specifications.
Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.
Requirements:
5+ years of experience in RTL design or RTL verification.
Previous experience in networking - an advantage.
B.Sc. in Electrical Engineering or Computer Engineering.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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2 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are seeking an exceptional architect to join our Architecture team and help shape the future of quantum computing. As quantum computers near production scale, were uniquely positioned to define the system, the hardware, and software architecture that will power the next generation of computing.
In this role, you will be part of the architecture team, responsible for innovating, developing, demonstrating, and rapidly prototyping new hardware and end-to-end system concepts. This position requires strong hands-on expertise in hardware development, including PCB design, analog and power circuits, RTL, and control software. We are looking for someone with a strong ability to learn and adapt, a genuine passion for deep technical ownership and growth within the company. You will work closely with Product, R&D, and Research teams to turn ambitious ideas into working technical solutions. Youll work as a key contributor and technical expert, collaborating closely with all the company's technical disciplines.
Responsibilities:
Rapid prototyping of new hardware and technology concepts
PCB and analog circuit development
Measurements of analog and system performance to meet the product requirements
Evaluation of the prototype, including performance, compliance, implementation of risks, and potential mitigations.
Handover of the POC / prototyping results to R&D, including documentation and reference design.
Requirements:
BSc. in Electrical Engineering or equivalent, MSc. or PhD - an advantage
5+ years of experience in PCB, analog circuit, and power electronics design.
Familiar with analog performance, benchmarking parameters, and design techniques. including 1/f noise, phase noise, rise \ fall time, settling time, SFDR, HD, etc.
Highly experienced in Altium for PCB design and analog simulation
Highly experienced in analog frontend, PLLs, op-amps, filters, DACs, and ADCs covering frequencies from DC up to 2GHz and above, and high-speed interfaces.
Hands-on experience in Lab work, analog performance measurement, and debugging
RTL coding for FPGA, Xilinx, Lattice - an advantage
Python and lightweight software for hardware control and measurement automation - advantage
Highly independent, resourceful, and creative.
This position is open to all candidates.
 
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5 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are now looking for a Senior Chip Design Verification Engineer to join our Switch Silicon team.As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What You'll Be Doing:
Work in a design/verification team which develops core units within the Switch silicon.
Micro-architecture of dynamic verification environments planning for units and modules.
Design dynamic verification environments of units/blocks according to Arch. specifications under challenging constraints with high orientation to power, area, and performance.
Work closely with multiple teams within organizations such as Architecture, u-arch, Full chip Micro-Architecture, BE, and FW.
Requirements:
Electrical Engineering B.Sc. or Computer Engineering B.Sc. graduate with high scores or equivalent experience.
5+ years of experience in RTL design/dynamic verification.
Knowledge in network protocols and/or HPC and distributed calculations - advantage.
A team player with good communication and interpersonal skills.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture (ARCH) and multiple production teams.
Provide a quality functional coverage for our company designs.
Test Development and Automation, Design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++) to verify SmartNIC functionality and performance.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related field, or equivalent practical experience.
5 years of experience with functional tests for silicon validation (i.e., writing in C or C++).
5 years of experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Experience and knowledge in packet processing, data path, packet buffering, scheduler, networking protocols offload engine.
Knowledge in L1/L2 layers, Ethernet SerDes, MAC+PCS.
Knowledge of System on a chip (SoC) architecture, including boot flows and embedded processors/firmware.
Ability to focus on validating key features, including Ethernet interface (SerDes, MAC + PCS) PCIe high-speed interface, network protocols (e.g., Ethernet, RDMA, NVMe), packet processing, data path, packet buffering, and embedded processors/firmware.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a research and development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs, collaborate with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with strategic value add (SVA) and industry-leading formal tools.
Identify and write all types of coverage measures for stimulus and corner cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in electrical engineering or equivalent practical experience.
4 years of experience working with design networking like remote direct memory access (RDMA) or packet processing and system design principles for low latency, throughput, security, and reliability.
Experience creating and using verification components and environments in standard verification methodology.
Preferred qualifications:
Experience in verifying digital systems using standard internet protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in transmission control protocol (TCP), IP, ethernet, PCIE, and dynamic random-access memory (DRAM), network on chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques and the full verification lifecycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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