דרושים » הנדסה » Logic Digital Verification Engineer

We are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.
Responsibilities
Lead the full verification lifecycle and methodologies. Plan, Design and Execute verification of SV/UVM Block level and Full chip environments , creating and execution test plans, tracking progress, and ensuring verification closure across diverse Mix-signals SoC simulation using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.

Required Logic Design Engineer
Responsibilities
Design and implement complex digital circuits for ultra low-power SoC.
Participate in all phases of SoC design, from specification to coding, debug and tape-out.
Perform RTL design, synthesis, and timing analysis.
Optimize designs for power, performance, and area (PPA).
Collaborate with cross-functional teams, including architecture, System, Software, Analog, verification, and physical design engineers.
Contribute to the development of design methodologies and best practices.
Debug and resolve design issues.
Support Lab bring ups, debug and other activities.

We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.

Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM.

we are looking for a ASIC Logic Design Engineering Technical Leader.
our Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab

We are looking for a hands-on, experienced Physical Design Engineer to join us and help define and implement next-generation AI SoC in an advanced technology node

You will play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.

What Youll Do

Take part in shaping methodology and best practices in advanced technologies

Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff

Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification

Define and optimize static timing constraints, area, and power goals at block and top levels

Take part in flow development and automation to improve efficiency and quality of results

we are looking for a Senior Verification Engineer.
Your Impact
Develop advanced verification environments using SystemVerilog and UVM
Write, run, and debug testbenches to ensure complete functional coverage
Drive pre-silicon and in-lab debug activities to resolve complex issues
Collaborate with RTL, architecture, and physical design teams to achieve design closure
Support methodology development, scripting, and automation to enhance productivity
Contribute to the success, powering the next generation of Internet infrastructure

we are looking for a Electrical Post Silicon Validation HW Engineer.
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
* Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
* Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.
* Handle all chip validation aspects, including:
* Building validation plans.
* Performing EPSV using advanced test and measurement equipment.
* Writing tests in Python over device SDK.
* Executing tests and analyzing results.
You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.

Innovation starts from the heart. At our company, we put patients first. We invest a significant proportion of our revenue towards research and development to drive and develop groundbreaking medical innovations for structural heart disease. As part of our R&D Engineering team, you will work closely with our Quality and Manufacturing teams to develop the latest tools and technologies to address significant, unmet clinical needs that impact patients lives around the world.
we are looking for a System Integration Engineer to join our Innovation Center in Caesarea, Israel. In this role, you will lead the integration of sensors (ECG, Bioimpedance) into a heart valve system (delivery and implant). The role includes managing the tasks of 2-3 team members and 1-2 sub-contractors, leading the technical aspects of the mechanical, software, hardware and algorithm development, coordinating tasks to achieve R&D milestones, present project plans, value propositions and demonstrate feasibility to leadership while driving alignment with cross functional teams.
How youll make an impact:
Manage a project with a small team of engineers (3-5 people, no direct reports)
Deliver the R&D plan with needed adjustments
Lead design activities including brainstorming, conceptual design, feasibility testing and VoC.
Collaborate with cross functional teams (marketing, US based R&D).
Develop testing models to prove design theories and validate them.
Lead proof of concept development work including animal trials, in-vitro testing and supporting analyses.
Manage subcontractors in the fields of SW, HW and algorithm development.

Our group is responsible for the development of next generation SoC for AI Networking Compute . The development starts from product definition through architecture, design, verification and up to implementation.

The complex SoC is a high-performance device running AI scale-out for inference workloads computer for vision and audio processing, with technologies from multi-disciplines.

We are seeking a full-time, on-site Validation engineer to lead automation and manual testing efforts across our product line. This role encompasses validation, functional verification, and Quality Assurance activities for medical devices integrated with Windows, Android, IOS, and web applications. The successful candidate will also provide technical guidance to our offshore validation team in India.