דרושים » הנדסה » Head of Hardware Group

We are seeking an experienced Software Team Leader to lead the design, implementation, and optimization of our graph compiler key backend functionalities. You will own and drive the development of compiler infrastructure that transforms high-level computational graphs into efficient, hardware-optimized execution flows. This role combines deep technical leadership with people management responsibilities.
Responsibilities:
Take full ownership of key components within the graph compiler backend. Lead, mentor, and grow a team of talented software engineers; set priorities, review designs, and ensure timely, high-quality delivery. Drive the definition and the implementation of backend compiler architecture to support various graph IR transformations, optimization passes, and hardware abstractions. Lead the identification and implementation of compiler-level optimizations to maximize performance and efficiency of workloads on target hardware. Drive clear and transparent work planning by balancing performance goals and time-to-market considerations, fostering a proactive can-do mindset across the team. Establish best practices for code quality, testing, documentation, and continuous integration within the compiler team. Work closely with frontend compiler, runtime, architecture and hardware design teams to ensure seamless integration across the software stack.

we are looking for a Group Lead, Technical Writing.
As a Technical Writer Group Lead, you are a first-line manager who translates business needs and priorities into clear plans, strategies, and execution for your global team of Technical Writers. You bring technical and documentation leadership, shape the teams information architecture and ways of working, and empower each writer to grow and take ownership.
You will be accountable for the overall results of your group, including the quality and impact of the documentation, customer and stakeholder satisfaction, and the development and well-being of your team members. You will zoom out to define strategy and direction, and zoom in when needed to support, mentor, and remove obstacles.
How will you make an impact?
Building and communicating a clear documentation strategy and product roadmap, aligned with business objectives and R&D/Product priorities.
Leading, coaching, and mentoring a global team of Technical Writers, driving excellence in technical depth, writing quality, collaboration, and ownership.
Ensuring delivery excellence by planning and tracking documentation work against release milestones, managing risks and dependencies, and guaranteeing on-time, high-quality deliverables.
Embedding everyday use of AI into the teams workflows - from research and drafting to reviews, reuse, and analytics - and modeling responsible, efficient AI practices that boost velocity and amplify the teams expertise and decision-making.
Partnering closely with Product Management, R&D leaders, Architects, UX, and Support to embed documentation into feature discovery, design, development, and post-release learning loops, and to drive continuous improvement of processes, tools, and information architecture.
Collaborating with other Technical Writer Group Leads to strengthen cross-team communication and collaboration, contributing to the ongoing growth and impact of our established Center of Excellence.
Owning team health and capability-building - shaping the right skill mix, applying competency frameworks, running effective 1:1s, and leading recruitment, onboarding, and development to build a strong pipeline of future leaders and domain experts.
Representing the documentation group across the organization by communicating impact, advocating for team needs, and driving agile and cultural improvements.

We are seeking a highly skilled and motivated Team Leader - Python Automation Infrastructure and testing to join our R&D organization. This role is central to building and leading our automation Infrastructure and testing, ensuring robust test coverage across SW components, integration, system, and end-to-end levels.
The successful candidate will provide both technical leadership and hands-on contribution-mentoring a team of automation engineers, establishing best practices, writing automated tests, and driving adoption of modern automation tools based Python and CI/CD methodologies. While the primary focus is integration automation, knowledge of RF systems/Cyber and DevOps is a strong plus.
Key Responsibilities:
Bachelor's degree in Computer Science or related field.
Lead and mentor a team of automation engineers, setting technical direction, assigning tasks, and supporting professional growth.
Architect, implement, and maintain scalable automation frameworks using Python and Pytest.
Write, review, and optimize unit, integration, and regression test cases to ensure high-quality software delivery.
Oversee automation of system-level and end-to-end testing, including API and UI layers (Selenium preferred).
Design and maintain CI/CD pipelines with Jenkins, Docker, and Git, ensuring automated testing is integrated into every stage of development.
Collaborate closely with software developers, RF, QA, DevOps, and hardware teams to embed testing and automation best practices into the product lifecycle.
Define, track, and report test metrics such as coverage, execution reliability, and defect detection effectiveness.
Promote a culture of quality and continuous improvement, introducing new tools and practices to strengthen automation.
Act as a technical expert, conducting code reviews and ensuring adherence to coding/testing standards.

We are looking for a hands-on leader to head a small team that builds simulation models for our next-generation AI hardware and DSP. Modeling is done in several layers, from cycle-accurate, bit-exact block level modeling, to event-driven full IP system flows.
Your groups mission is to take part in the exploration phase of a project, giving architects rapid, high-fidelity feedback so they can explore design options, and to perform algorithmic regression, detecting deadlocks, sweep parameters and features, and understand system-level impact in a quickly adapting, dynamic development environment.
Beyond pure performance modeling, youll keep a sharp eye on functional accuracy and QA, follow emerging academic and industry trends, and inject the relevant insights into the product.
You will also champion modern AI-assisted coding tools (e.g., Cursor AI, GitHub Copilot) to lift the productivity of the senior software engineers on your team and shorten iteration cycles.
Responsibilities:
Lead and mentor a team of simulation and modeling engineers; set goals, review designs, and remove roadblocks. Design and implement transactional / cycle-accurate / bit-exact / event-driven models that faithfully represent advanced AI IP blocks (Transformers, CNN accelerators, custom DMA, interconnects, power-management units, etc.). Build automated flows to sweep architectural parameters and features, collect metrics, and visualize system-level impact on performance, area, power, and bandwidth. Analyze and debug complex issues such as deadlocks, race conditions, and performance hotspots; deliver concise root-cause reports and actionable recommendations. Collaborate daily with architecture, VLSI, compiler, and firmware teams to translate new algorithms and hardware ideas into model requirements and specifications. Own accuracy and QA of the simulation stack: golden-model alignment, coverage tracking, regression health, and release sign-off. Continuously survey academic papers and industry trends, extract meaningful insights, and propose innovative modeling techniques or architectural directions. Promote the adoption of AI-powered development tools to accelerate coding, code-review, documentation, and test generation across the team.

We seek a highly motivated and experienced System Architect specializing in Data-Center, AI Fabric, and Ethernet Networking to join our team of experts and help shape the future of high-performance ML/AI computing. You will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. You will play a key role in defining end-to-end solutions, networking protocols and features, interworking with orchestration systems, and help address new business opportunities in exciting areas. Our Architects also represent us in open-source projects, technical conferences, and standard development organizations.

What you'll be doing:

Explore new technologies and end-to-end solutions for our Ethernet Networking Platforms.

Be familiar with data-center and AI fabric network topologies, AI/ML clusters operation and network usage, as well as with the Ethernet Switch platforms' design and characteristics.

Define robust architectures and technical requirements for network operating systems and end-to-end solution offering for AI/ML workloads' needs and highly performing network operations.

Lead the work with R&D and Validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and test plans.

Collaboration with architects across various fields, including Chip Design, Firmware, Hardware Platforms, and System teams.

Close work with product marketing, program managers, and account managers to ensure the successful execution of projects.

Support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.

Promote innovation through the design and implementation of Proof-of-Concept (PoC).

We seek a highly motivated and experienced Software Architect specializing in Ethernet Switch ASICs to join our team of experts and help shape the future of high-performance ML/AI computing. You will have the opportunity to work on some of the most pioneering technologies and help drive the innovation of our next-generation networks. You will play a key role in defining switching software stacks and Linux kernel networking, and help address new business opportunities in exciting areas. Our Architects also represent us in open-source projects, technical conferences, and standard development organizations.

What you'll be doing:

Explore networking technologies, features and protocols, hardware/software capabilities, open-source software and drivers for our Ethernet Switch ASICs and Networking platforms.

Be familiar with the Ethernet Switch ASIC hardware and software stacks, as well as with the Ethernet Switch platforms design and characteristics.

Define robust architectures and technical requirements for embedded software, meeting AI/ML workloads' needs and highly performing network operations.

Lead the work with R&D and Validation teams, providing technical guidelines and close support and thorough reviews for detailed designs and test plans.

Collaboration with architects across various fields, including Chip Design, Firmware, Hardware Platforms, and System teams.

Close work with product marketing, program managers, and account managers to ensure the successful execution of projects.

Support engagements with key customers, issue patents, publish white papers and blogs, and be proactive in technical forums and industry working groups.

Promote innovation through the design and implementation of Proof-of-Concept (PoC).

We are seeking an experienced and hands-on Senior RF Automation Engineer with strong, proven Python expertise to join our R&D team.
This role is focused on building and maintaining advanced automated test solutions for RF systems. You will architect, develop, and execute automation frameworks and tooling to validate complex RF designs and ensure world-class product reliability and performance.
This position is ideal for a self-driven engineer with a deep understanding of RF measurement techniques and a strong software development mindset. You will play a critical role in shaping our automation strategy and influencing next-generation RF product development.
Key Responsibilities:
Lead the development and maintenance of Python-based automated RF test frameworks, tools, and scripts.
Design, execute, and optimize RF test environments and automated test stations.
Configure, calibrate, and operate RF test equipment such as Vector Signal Generators (VSGs), Spectrum Analyzers (SAs), and related instruments.
Create and validate RF test setups for performance validation, debug, and system characterization.
Analyze complex RF datasets, generate detailed reports, and communicate results to R&D leadership and cross-functional teams.
Collaborate with hardware, firmware, and software teams to embed automated testing into the entire development lifecycle.
Continuously enhance automation efficiency, coverage, and capability-leveraging best-practice testing methodologies.
Research and introduce innovative RF automation tools, frameworks, and workflows aligned with R&D goals.

Our Networking BU is looking for Senior Software Program Manager that will be responsible for software programs and projects. The PM should drive planning and execution of FW/SW projects while aligning with corporate priorities and constraints.

Our Mellanox Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer best-in-class solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize data center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of markets including high-performance computing, enterprise, data centers, cloud computing, big data and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our product line is focusing on delivering the most optimized Ethernet solutions for industries like Media and Entertainment as well as any other industry that can benefit from our Datastream and TCP/IP acceleration.

What you'll be doing:
You will manage the networking software programs for our next generation AI Data centers.
Responsible to coordinate between all project stakeholders such as marketing, engineering teams in IL and around the world, operations, etc. from initial requirements definition through Architectural stage, execution, and delivery.
Develop and execute feature planning and prioritization of perception capabilities to meet the software programs' needs.
Identify risks, gaps, and bottlenecks in time, and find resolution with technical leaders and project management.
Work with product managers, architects, and engineers to ensure consistency with company strategy, commitments, and goals.

we are looking for a Senior System Engineer.
Responsibilities:
Lead features and platforms from ideas to releases.
Guide and participate in the research and analysis of both proprietary and standard radio communication protocols.
Define requirements and guide multi-disciplinary teams (SW, Algorithms, DSP, and FPGA) through implementation and debugging.
Analyze and define complex system behaviors, state machines, algorithms, and event-response logic, including radio link budget considerations.
Perform independent, hands-on debugging and optimization for system problem-solving using tools like MATLAB, Python, Excel, and other log analysis software.
Create and maintain comprehensive system-level documentation.
Gain a deep understanding of the full system to guide and support testing and validation teams, helping define methodologies, tools, and coverage strategies.

We are seeking a highly skilled Senior Communication PHY Algorithms Engineer.
This senior role is focused on the end-to-end research, design, and implementation of digital receivers for proprietary drone communication signals.
Responsibilities:
Mathematically characterize complex communication and signal detection problems. Analyze and assess design trade-offs based on both performance metrics and implementation complexity.
Develop and maintain simulations using MATLAB and Python.
Design digital receiver modules to be implemented either by FPGA of SW.
Implement features directly in SW or technically lead and verify the FPGA implementation efforts of the FPGA engineer.
Accompany the integration process of the feature until its end-to-end operation.