Were looking for a Physical Design Expert to join the growing Physical Design Team, responsible for developing our next generation Imagining Radar SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.
Requirements: BSc or MSc degree in Computer Engineering or Electrical Engineering.
8+ years experience in the Physical Design field.
Experience with high speed interfaces (DDR/PCIE) - an advantage.
Experience with advanced nodes (5nm and below) - an advantage.
Team player with excellent communication skills, customer orientation, and a can-do attitude.
Building or maintaining implementation tools and flow - an advantage.
Experience in scripting languages like Tcl/Python/Perl/TCSH.
This position is open to all candidates.