דרושים » חשמל ואלקטרוניקה » Director, Hardware Architecture

We are looking for a hardware architecture engineer to join the hardware team! hardware team responsible for full execution of systems ,adapters and interconnect for AI cluster deployments.

What you'll be doing:

Lead hardware next generation end-to-end definition and architecture (Switch, interconnect, adapter).

Define form factor selection; SI, power and thermal consideration, and channel optimization (Mech/thermal/cluster layout).

Align hardware systems and chip design teams toward unified definition.

Combine understanding of hardware end-to-end in parallel with Software aspects.

The position requires working closely with different Engineering and Operations teams

Looking for a Hands On Eng who is familiar with new technologies and can take a task from scratch to cocompletion with ease!

A leader in disaggregated high-scale networking solutions for service providers and AI infrastructures. Founded in December 2015, created a radical new way to build networks by adapting the architectural model of the cloud to telco-grade networking. This solution accelerates network deployment, improves the networks economic model, and radically simplifies network operations. With customers including Comcast, Orange, and KDDI - over 80% of AT&Ts network traffic now runs through a disaggregated core powered by software. Network Cloud-AI solution, based on the same technology, was introduced to the market in 2023, providing the highest-performance Ethernet-based AI networking solution, and is already deployed by Hyperscalers, NeoClouds and Enterprises. Raising over $587 million in three funding rounds, continues to deploy the most innovative network infrastructure and is looking for the most talented people to be part of this journey.

The role:
As a Product Manager Hardware, you will play a crucial role in driving the development and lifecycle management of our networking products, specifically focusing on high end systems, chassis and router/white box hardware components. You will work closely with cross-functional teams including engineering, design, marketing, sales, and contract manufacturing to deliver industry-leading solutions that exceed customer expectations and drive business growth.

Job Overview:
We are seeking a skilled and motivated Hardware Product Manager to join our dynamic team.
In this role, you will be responsible for the development, management, and successful launch of innovative hardware products.
You will work cross-functionally with engineering, design, marketing, and sales teams to drive product strategy and execution.
Product Strategy:
Define and communicate the product vision and roadmap.
Conduct market research to identify customer needs and trends.
Analyze competitive landscape and drive product positioning.
Product Development:
Collaborate with engineering and design teams to develop product specs and prototypes.
Manage the product lifecycle from conception to launch, ensuring timely delivery.
Cross-Functional Collaboration:
Liaise with marketing and sales teams to develop go-to-market strategies.
Coordinate with supply chain and manufacturing partners for product fulfillment.
Customer Focus:
Gather and prioritize customer feedback to inform product enhancements.
Monitor product performance post-launch and implement improvements as needed.
Reporting and Analysis:
Track product metrics and KPIs to assess success and identify areas for growth.
Prepare reports and presentations for stakeholders to update on product progress.

Our Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.

What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.

We are leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables outstanding creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. We are looking for excellent people like you to help us accelerate the next wave of artificial intelligence.

We are looking for a skilled, creative, and highly motivated Senior PHY System Engineer to join the End-to-End (E2E) physical-layer performance team, as part of the Post-silicon department

What youll be doing:

End-to-End responsibility on the link level performance characterization, verification, and debugging.

Debugging of link issues of NVIDIA systems, while diving into the product HW design and SW/FW operation.

Characterizing optical and electrical performance using lab equipment and SW tools.

Take an active part in silicon bring-up while managing E2E testing of newest ASICs, with the objective of driving product to mass production with first-in-class performance.

Characterizing products performance using lab equipment, such as oscilloscope, Spectrum/Network analyzer, Pattern-generator, etc.

Working in front of various test teams, with the responsibility of addressing issues and monitoring the test flows conducted by them

Leading data-driven discussions about the product functionality and areas for improvement.

Testing NVIDIA Electro-Optical and Electrical chips and systems.

Defining testing requirements for new products based on electrical and optical specifications.

We are seeking an experienced QA engineer to join our SW/FW testing team. This position will be part of our growing team, which enables our products to meet the industry-leading benchmarks of efficiency and quality. We develop a collaborative and inclusive work environment, where ideas are shared and innovation is encouraged. As a QA Engineer in this group, you will be immersed in the latest advancements and actively contribute to developing world-class products. Your efforts will directly impact the performance and quality of our offerings, ensuring they consistently meet industry-leading standards. We are looking for an ideal candidate with proven QA experience who will be actively involved in testing industry-leading features in the Networking sector, can acquire new feature knowledge, conduct both manual and automated tests, and contribute to the development of automation systems. The ideal candidate should bring a robust understanding for SW release cycle and the QA part in it.

What you'll be doing:
Review arch design and requirements documents for new features introduced in several domains like Infiniband and Ethernet Switches and NICs, our GPUs, NVLINK, Linkx and more.
Design, develop, and perform tests for the new features, as part of FW GA or update releases.
Automate newly added tests in the existing automation framework, and add new capabilities and features to the framework.
Report bugs found during execution, assist with reproduction and debugs to understand root cause, verify bug fixes provided by R&D team, and raise if not fixed.
Conduct tests in various areas, including regression, performance, functional, and security. Keep track of testing progress and generate summary reports of testing activities.
Fully collaborate with different external teams like : :product marketing, R&D, and verification.
Define and build setups topologies for appropriate product coverage.