דרושים » חשמל ואלקטרוניקה » Technical Program Manager, Silicon Engineer

We are widely considered to be one of the technology worlds most desirable employers, we own the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services.


The Chip Design group within our Networking Business division is looking for an experienced Program Manager to join its team.
The Program Manager will oversee the planning, execution and end-to-end tracking of Chip Design activities across various professional functions and organizations. The Program Manager will drive planning processes and governance execution of the Chip Design projects. He/She will work with executives and engineers within the organization and with all the interfacing organizations, while aligning with corporates Roadmap, priorities and targets.

What will you be doing:

Collaborate with project managers and engineering groups to align with the company's strategy, targets and tools.

Coordinate between all project stakeholders through all projects life cycle both Pre and Post Silicon, within Chip Design organization, and external groups like Corporate groups, BE, Architecture, Software, Firmware, Operations, etc.

Promote the use of managerial, data-driven decision-making, identify and emphasize potential issues and risks in project implementation.

Develop and implement Chip Design methodologies and Project management processes and tools.

We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities
Design, develop, test, deploy, maintain, and improve CPU software modeling and other software tools.
Manage individual project priorities, deadlines, and deliverables.
Collaborate with hardware and software CPU architecture teams, SOC performance modeling team, and other Google Software teams.

Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs.
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team.
Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.

The Chip Test Engineer plays a crucial role in designing, developing, and implementing automated test for IC chips and systems for Automotive industry. The Test Engineer is responsible to define and develop tests, design test features, program test scripts, and analyze test results to ensure the quality and functionality of products. The Test Engineer collaborates with cross-functional teams to troubleshoot issues, improve test processes, and support product development efforts.

Responsibilities:
Develop and implement test strategies, plans, and procedures for ATE systems to ensure comprehensive testing of ICs.
Design and develop test features, test programs, and test scripts for automated test environment (ATE) based on product specifications and requirements.
Collaborate with design engineers, product manager, production vendors and manufacturing teams to understand product functionality, performance requirements, and testability considerations.
Conduct feasibility studies and risk assessments to identify potential challenges and develop mitigation strategies for test development and implementation.
Develop test program based on code languages C++ , Java and Python.
Debug, troubleshoot, and resolve issues with ATE hardware, software, and test scripts to ensure reliable and accurate test results.
Analyze test data and results to identify trends, anomalies, and potential defects, and provide feedback to design and development teams for product improvement.
Develop and maintain documentation for test procedures, specifications, and configurations.
Collaborate with vendors and suppliers to evaluate and select ATE equipment, components, and software tools that meet project requirements and performance standards.
Stay abreast of industry trends, advancements in test technologies, and best practices in automated testing to drive continuous improvement in test processes and methodologies.

We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Define the System on a Chip (SoC)/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, SystemVerilog), function/performance simulation debug and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure and Application-specific integrated circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SoC level verification.
Communicate and work with multi-disciplined and multi-site teams.

The Project Manager is ultimately responsible for project oversight and review of all disciplines including electrical, mechanical, controls, and architectural. A fundamental understanding of these systems is required, as the individual will be expected to identify areas for improvement as well as act on data provided from other teams and organizations. Ideal candidates will possess the ability identify and deploy innovative solutions to address operational challenges. This role requires both independent contribution as well as the ability to work across stakeholder teams. The scope of projects will include but not limited to the improvement of electrical, mechanical, fire detection and building automation systems. The Project Manager is responsible for the overall direction, coordination, implementation, control and completion of specific projects ensuring consistency with company strategy, commitments and goals.

If you are passionate about the customer experience and you want to contribute to the operational excellence of data centers then this may be the challenge youve been looking for!

Key job responsibilities
- Project management and oversight of construction related activities as they relate to modifying existing infrastructure for the purpose of installing new or to replace end of life equipment. This will include the ownership of the project scope, timeline, and budget.
- Provide project management for specific initiatives aimed at increasing the resiliency of our data centers.
- Electrical design and review of designs associated with the optimization of existing data centers.
- Construction/project package drawing review.
- Creation of project scope, request for proposals, and capital requests.
- Total project quality including the creation of a commissioning plan and oversight of the execution.
- Recording and reporting key metrics to team members and management.
- Operational support including review of procedures, best practices, and maintenance initiatives.
- Drive teams to perform troubleshooting and root cause failure analysis associated with equipment or electrical failures.
- Work with contractors and vendors to deliver efficient and high quality project turnovers.
- Be a leader within the group as well as within internal and external teams that support the data center.
- Travel to support projects in the EMEA region

We are seeking a highly skilled and expert Verification Lead to join our PCIe Firmware team. In this role, you will be responsible for supervising the verification plans, monitoring their execution within the teams, guiding engineers through the verification implementation, and tracking coverage, Coverity, and other relevant statistics. You will be joining a team dedicated to developing groundbreaking technology and building the core technology of next-generation our devices across various fields, including low-level C layer between hardware and firmware, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

Develop and lead verification plans, ensuring they are driven effectively within the teams.

Provide guidance to engineers on verification implementation within the verification environment.

Monitor coverage, Coverity, and other statistics to ensure comprehensive verification and optimization of next-generation our products.

Work closely with firmware design, chip design, software, and architecture teams to define and craft both legacy and new low-level firmware flows.

Enhance methodologies and automated processes to improve efficiency and effectiveness.

As a Tech Leader in the AI Algorithm Engineering group, you will play a pivotal role in both managing end-to-end AI research and development efforts and hands-on involvement in key-initiatives. Your responsibility will include design, implementation, guidance and mentoring for team members, and representing the AI considerations in cross-team discussions. You will leverage your extensive experience to lead multiple AI projects, and will be a key figure in leading successful execution and in finding creative solutions to difficult bottlenecks, across data, AI, engineering and product considerations.
Responsibilities:
Lead the design, development, and implementation of accurate and robust AI algorithms for medical data with a hands-on approach.
Collaborate with cross-functional teams, including data scientists, software engineers, product managers and clinical data experts, to ensure AI considerations have a profound impact on R&D and Product decisions across the projects.
Design and conduct research and experimentation to improve algorithm performance and accuracy.
Stay at the forefront of the latest advancements in AI and machine learning, particularly in the medical domain, and drive their adoption within the team.
Oversee multiple projects, ensuring successful execution, timely delivery and alignment with product and business objectives.
Provide strategic direction and technical mentoring to elevate the capabilities of the AI team.

We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect at our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you will be doing:

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.

Define the HW boot, clock and Reset architecture for Switch ASIC.

Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.

Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools on Emulation and/or FPGA platforms.
Lead the debugging and resolution of complex silicon issues, collaborating with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Build and mentor a high-performing team of silicon validation engineers, fostering a culture of collaboration, innovation, and technical excellence.