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03/04/2025
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
The Chip Test Engineer plays a crucial role in designing, developing, and implementing automated test for IC chips and systems for Automotive industry. The Test Engineer is responsible to define and develop tests, design test features, program test scripts, and analyze test results to ensure the quality and functionality of products. The Test Engineer collaborates with cross-functional teams to troubleshoot issues, improve test processes, and support product development efforts.

Responsibilities:
Develop and implement test strategies, plans, and procedures for ATE systems to ensure comprehensive testing of ICs.
Design and develop test features, test programs, and test scripts for automated test environment (ATE) based on product specifications and requirements.
Collaborate with design engineers, product manager, production vendors and manufacturing teams to understand product functionality, performance requirements, and testability considerations.
Conduct feasibility studies and risk assessments to identify potential challenges and develop mitigation strategies for test development and implementation.
Develop test program based on code languages C++ , Java and Python.
Debug, troubleshoot, and resolve issues with ATE hardware, software, and test scripts to ensure reliable and accurate test results.
Analyze test data and results to identify trends, anomalies, and potential defects, and provide feedback to design and development teams for product improvement.
Develop and maintain documentation for test procedures, specifications, and configurations.
Collaborate with vendors and suppliers to evaluate and select ATE equipment, components, and software tools that meet project requirements and performance standards.
Stay abreast of industry trends, advancements in test technologies, and best practices in automated testing to drive continuous improvement in test processes and methodologies.
Requirements:
Requirements:
Bachelor's degree in electrical engineering, computer engineering, or a related field.
Proven 5+ years of experience in automated test development, preferably in the semiconductor or electronics industry.
Experience in programming languages such as C/C++/JAVA/Python.
knowledge of ATE hardware platforms (e.g., Advantest or Teradyne) and test methodologies (e.g., parametric testing, functional testing).
Familiarity with electronic measurement instruments (e.g., oscilloscopes, multimeters, signal generators) and test techniques for analog and digital circuits. Advantage RF test.
Excellent problem-solving skills and the ability to troubleshoot complex issues with ATE systems and test setups.
Strong communication and interpersonal skills, with the ability to work effectively in cross-functional teams.
Detail-oriented with a focus on quality, accuracy, and efficiency in test development and execution.
Ability to work independently, prioritize tasks, and manage multiple projects simultaneously in a fast-paced environment.
Preferred Qualifications
Experience in Mix-signals, high-speed interfaces testing fields.
Experience with test data analysis tools (e.g JMP, Spotfire, Yield HUB, Silicon Dash).
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop ATE test modules, DC tests, binning, production and characterization flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high volume manufacturing (HVM), working with ATE vendors.
Support product, volume data analysis of screening and characterization data, test time and yield improvements, assess test escapees and Return Materials/Merchandise Authorizations (RMAs), localize failures, implement containment measures and partner with design, manufacturing, quality and reliability teams to root cause and implement corrective actions.
Develop tools, flows and methodologies to improve and automate the testing.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
2 years of experience in design, test, manufacturing, or process engineering.
Experience with Application-Specific Integrated Circuit (ASIC) test methodologies (mbist, atpg, dft serdes, sensors).
Experience coding in Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Experience in pre-silicon validation, test content generation, ATE program development, and post-silicon enabling from New Product Introduction through High Volume Manufacturing.

Preferred qualifications:
Experience in developing or integrating Manufacturing Test Hardware using Electrical and Thermo-mechanical components.
Experience in creating Manufacturing Test strategies for Printed Circuit Board Assembly (PCBA) and systems that cover Structural through Functional and System tests.
Experience in ATE hardware design and proliferation: loadboards/probecards, handler kits, sockets, and thermal control solutions.
Experience in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Experience with CPU/GPU SoC architecture, design, validation and debug.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Create software solutions that improve the hardware post-silicon testing process through automation. This includes, but is not limited to, developing and maintaining an ATE program development infrastructure for both production and development environments.
Propose, design and implement software automation that directly addresses bottlenecks in today's post-silicon test flow, from DFT to ATE.
Work directly with a Hardware team on projects - prototype and then deploy tools to make a positive impact on Google's chip hardware development process.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies.
Review code developed by other developers and provide feedback to ensure best practices (e.g., style guidelines, checking code in, accuracy, testability, and efficiency).
Requirements:
Bachelor's degree or equivalent practical experience.
5 years of industry experience with systems and debugging.
5 years of experience in ATE tools, flows, and methodologies.
Experience in ATE test development, from DFT/Design Verification (DV) to ATE (e.g., Reset, Automatic Test Pattern Generation (ATPG), Memory Built-In Self Test (MBIST), or functional content development to ATE patterns).
Experience in ATE test method library development - taking ATE low level drivers and developing automated solutions.

Preferred qualifications:
Proficiency in code and system health, diagnosis and resolution, and software test engineering.
Understanding of object oriented programming and functional programming.
Excellent software skills and design practices
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Execute activities in the design, implementation, and verification of Design for Testing solutions for Application-Specific Integrated Circuit (ASICs).
Develop DFT strategy for hierarchical DFT, Scan, and Automatic Test Pattern Generation (ATPG).
Perform ATPG scan, cover debug and motivate design fixes for coverage and quality improvements.
Perform scan verification at Register-Transfer Level (RTL) and gate level.
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT Scan requirements are met and mutual dependencies are managed.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
2 years of experience in Automatic Test Pattern Generation (ATPG) methods.
Experience with multiple projects in Design for Testing (DFT) scan design and verification.
Experience with Design for Testing (DFT) techniques and tools, Application-Specific Integrated Circuit (ASIC) Design for Testing synthesis, simulation, and verification flow.

Preferred qualifications:
Master's degree in Electrical Engineering.
Experience working with Automated Test Equipment (ATE) engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, debug of silicon issues).
Experience in System on a chip (SoC) cycles, including silicon bringup and silicon debug activities.
Experience in IP integration (e.g., memories, test controllers, Test Access Point (TAP), and Memory Built-In Self Test (MBIST)).
Experience in fault modeling.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Develop and implement strategies for high volume manufacturing of SoC products, including troubleshooting, ATE test coverage optimization, DPPM reduction, Test cost reduction, power and performance assurance, and product data integration and correlation between system, ATE, and System Level Test (SLT).
Drive interactions with wafer fabs and OSATs, own and drive checkpoints for key quality metrics.
Drive volume ramp and mass production through test program releases, volume data analytics, lot disposition, extended test time reduction, yield improvement, and RMA handling.
Collaborate with cross-functional teams across the globe including ATE and SLT Test Engineering, Q&R, Packaging, Supplier Management and Operations to build, deploy, and maintain a high volume manufacturing screening solution.
Support setup and maintenance of test, diagnosis, and yield analysis infrastructure, including RMA support.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
8 years of experience in product engineering or test engineering.
Experience with product engineering, supply chain data analytics, diagnostics for High Volume Manufacturing, or NPI.
Experience with ATE and SLT.
Experience in statistical analysis (e.g., JMP), Yield Management Systems (e.g., Exensio, Yield Explorer, JMP), or Python for data analytics.

Preferred qualifications:
Masters degree in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
12 years of experience in product engineering and test engineering.
This position is open to all candidates.
 
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07/04/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are seeking a highly skilled and expert Verification Lead to join our PCIe Firmware team. In this role, you will be responsible for supervising the verification plans, monitoring their execution within the teams, guiding engineers through the verification implementation, and tracking coverage, Coverity, and other relevant statistics. You will be joining a team dedicated to developing groundbreaking technology and building the core technology of next-generation our devices across various fields, including low-level C layer between hardware and firmware, C++ verification environment, automation challenges, and Python testing environment.

What youll be doing:

Develop and lead verification plans, ensuring they are driven effectively within the teams.

Provide guidance to engineers on verification implementation within the verification environment.

Monitor coverage, Coverity, and other statistics to ensure comprehensive verification and optimization of next-generation our products.

Work closely with firmware design, chip design, software, and architecture teams to define and craft both legacy and new low-level firmware flows.

Enhance methodologies and automated processes to improve efficiency and effectiveness.
Requirements:
What we need to see:

B.Sc. in Electrical Engineering, Computer Science, or Computer Engineering, or equivalent experience.

12+ years of relevant experience.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.

Problem-solving skills, independence, curiosity, strong interpersonal skills, and self-learning ability. Multi-disciplinary capabilities and the ability to work with a wide interface of people are crucial.

Ways to stand out from the crowd:

Familiarity with hardware verification concepts and tools such as C++, Jenkins automation, hardware familiarity, and test-driven development (TDD).

Experience in partnering with software and architecture teams to define and implement firmware.

Knowledge of PCIe, networking, Linux, and scripting languages, along with experience in solving in-depth problems.

Knowledge of object-oriented programming, computer structure, operating systems, and familiarity with Python or Bash is advantageous.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
Lead and execute activities in the design, implementation, and verification of DFT solutions for large-scale ASICs.
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage the DFT team's workload and deliverables, provide technical leadership and guidance to the team.
Lead DFT execution of a silicon project - planning, execution, tracking, quality, and signoff.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Automatic Test Pattern Generation (ATPG) methods.
4 years of people management experience developing employees.
Experience with multiple projects in DFT design and verification, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and tools, ASIC DFT synthesis, simulation, and verification flow.
Experience in leading DFT activities throughout an ASIC development flow.

Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in JTAG and iJTAG protocols and architectures.
Experience in post-silicon test or product engineering.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Build and mentor a high-performing team of silicon validation engineers, and foster a culture of collaboration, innovation, and technical excellence.
Develop and execute comprehensive validation plans for Google's custom silicon, covering functional, performance, power, and reliability aspects.
Design and build scalable validation test infrastructure, including hardware setups, software frameworks, and automation tools.
Lead the debug and resolution of silicon issues, collaborate with cross-functional teams such as design, architecture, software, and firmware.
Analyze validation data to identify trends, root causes, and opportunities for improvement in silicon quality and reliability.
Requirements:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in silicon validation or a related field, with leading teams, and delivering projects.
8 years of experience of silicon validation methodologies, tools, and techniques.

Preferred qualifications:
Experience with Field-Programmable Gate Array (FPGA) prototyping, emulation, or simulation platforms.
Ability to convey technical concepts to audiences.
Ability to lead and inspire technical teams, drive results, and build cross-functional relationships.
Excellent written and verbal communication skills.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo
Job Type: Full Time
Define and lead qualification hardware and test developments in front of internal teams and external vendors.
Define and execute Silicon and package qualification activities (HTOL, ELFR, ESD/LU, b/HAST, THB, etc.).
Extract, manipulate, and analyze large volumes of data from Silicon and Package qualification programs (e.g. HTOL, ELFR, ESD, LU, UHAST, TCT, etc.), High Volume MFG, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield and quality and reliability improvement.
Own cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (RMA Triage, Analytics, Failure Analysis, etc.).
Develop and implement physics-based statistical Quality and Reliability models (ELF, TDDB, NBTI, HCI, Time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.
Requirements:
Bachelor's degree in Electrical Engineering, Materials Science, a related field, or equivalent practical experience.
8 years of experience in IC silicon quality or reliability.
Experience in semiconductor CMOS technology, device physics, failure mechanisms, and accelerated test methodologies.
Experience in reliability modeling, data analytics, and statistics.

Preferred qualifications:
Experience in semiconductor reliability, manufacturing processes (fab, assembly, test), or IC and packaging failure mechanisms and related failure analysis.
Experience in data analytics, especially to identify commonalities and abnormalities.
Knowledge of Design-for-Reliability guidelines and implementation techniques.
Familiarity with test methods and hardware for silicon qualification (e.g., HTOL chambers, ESD, LU, etc.).
This position is open to all candidates.
 
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17/04/2025
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an experienced System Validation Engineer to join our Runtime Validation Team.
In this role, you will be responsible for validating runtime stack components for classic and generative AI applications, ensuring their reliability, performance, and robustness. Your work will have a direct impact on our products, shaping the quality and stability of AI-driven solutions used in real-world applications.
Responsibilities
Design, develop, and execute validation test plans for runtime stack components, neural core firmware, and drivers, while accompanying them throughout the entire feature life cycle, from
design and integration through automation and release, ensuring ongoing support and adaptation of tests as the product evolves.
Develop automation frameworks and testing tools in Python and C++.
Analyze test results, debug issues, and work closely with software and hardware teams to drive resolution.
Ensure continuous integration (CI) pipelines maintain high test coverage and efficiency.
Optimize validation strategies for classic and generative AI workloads.
Requirements:
B.Sc. in Computer Science or Electrical Engineering from a top university (GPA 85+).
5+ years of experience as a System Validation Engineer.
5+ years of experience in software development (Python, C/C++).
Experience working with Linux environments.
Understanding of CI/CD pipelines and test automation frameworks.
Strong analytical and debugging skills.
Quick learner with a hands-on approach.
Hard-working, committed, and self-reliant.
Proactive mindset, with strong interpersonal and communication skills.
Ability to work effectively in a team.
Fluent English.
Advantages
Experience with embedded systems, hardware accelerators, or edge AI applications.
Experience in validating GenAI applications like LLMs and Stable Diffusion.
Experience with Yocto build system for embedded Linux development.
Experience with Docker for containerized application development and testing.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, DV, ARCH and multiple production teams.
Provide quality functional coverage for Google designs.
Requirements:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related field, or equivalent practical experience.
Experience with functional tests for silicon validation, (i.e., writing C or C++) or developing firmware, and embedded software.
Experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.

Preferred qualifications:
Experience with board schematics, layout, and debug methodologies using lab equipment.
Experience with hardware prototyping, including hardware or software integration (e.g., pre-silicon use of emulation, software-based test, and diagnostics development, etc.).
Experience with scripting (e.g., Python) for automation development.
Experience in launching design, verification, or emulation.
Knowledge of SoC architecture, including boot flows.
This position is open to all candidates.
 
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