דרושים » חשמל ואלקטרוניקה » Senior Hardware Network Engineer

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לפני 1 שעות
Location: Yokne`am and Tel Aviv-Yafo
Job Type: Full Time
The Networking Application Engineering team is looking for a motivated, experienced Senior Hardware Engineer who thrives at the intersection of hardware performance, ecosystem validation, and ODM/OEM partnerships. In this high-impact role, you will own critical qualification tooling, drive the design-in process with leading hardware partners, and collaborate across םור R&D organization to accelerate hardware resolutions at scale. Your work will directly influence the quality and velocity of next-generation networking hardware reaching the world's most advanced data centers and supercomputers.

What You'll Be Doing:

Own and lead the Hardware Performance and Qualification tooling suite, driving continuous improvement in test coverage, automation, and accuracy in collaboration with leading ODMs and OEMs.

Drive the design-in process with top-tier ODM and OEM partners, ensuring seamless hardware integration and delivering best-in-class platform experiences.

Partner cross-functionally with multiple R&D departments to identify, escalate, and resolve hardware issues rapidly - reducing time-to-resolution and maintaining platform quality.

Define and execute qualification plans for new hardware platforms, validating performance, stability, and compliance across diverse system configurations.

Build and nurture trusted technical relationships with ODM/OEM engineering teams, acting as the go-to expert for hardware performance and qualification.

Provide actionable feedback to engineering and product teams based on qualification findings and partner interactions.
Requirements:
What We Need to See:

BSc/MSc in Electrical Engineering, Computer Engineering, or a related field or equivalent experience.

5+ years of experience in hardware development, including high-speed multilayer PCBs.

Proven problem-solving skills with a track record of driving issues to closure.

High proficiency in English communication and presentation.

Excellent interpersonal skills - comfortable engaging directly with ODM/OEM technical counterparts.


Ways to Stand Out from the Crowd:

Knowledge of server topology, PCIe protocols, BMC interfaces, and security aspects.

Experience with the physical layer of network and PCIe ports, including SerDes tuning.

Proven track record working directly with ODMs and OEMs through design-in and qualification cycles.

Knowledge of high-speed signal integrity theory and practice, with experience using lab equipment.

Experience in script or firmware development to enhance test automation.
This position is open to all candidates.
 
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a motivated Senior System Validation Engineer to join our growing post-silicon validation team in Israel and support next-generation connectivity products for AI and data-center applications.
In this role, you will perform system-level post-silicon validation, characterization, and debug across silicon, hardware, firmware, and software. You will support silicon bring-up and PVT/corner testing, develop and execute functional and system validation tests, analyze results, and work with cross-functional teams to identify and resolve complex system issues.
This is a highly hands-on lab position. The primary location is Haifa, with temporary support at the Ramat Gan lab as needed.
Key Responsibilities:
Develop and execute post-silicon functional and system validation from silicon bring-up through production readiness.
Run PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.
Develop validation tests to verify functionality, performance, stability, power, and operating margins.
Debug issues across silicon, hardware, firmware, drivers, and system software.
Validate high-speed interfaces such as PCIe, CXL, Ethernet/SerDes, and DDR, as well as common system interfaces.
Develop Python scripts and automation to improve validation coverage, regression, and test efficiency.
Analyze validation data, identify issues and trends, and drive problems to root cause and closure.
Work closely with hardware, architecture, firmware, software, design, and DV teams to investigate and resolve issues.
Support the transition of new silicon from initial bring-up to a qualified, production-ready product.
Operate system platforms and laboratory equipment to support validation and debug.
Document test results, issues, root cause, and recommendations and communicate findings clearly.
Requirements:
Basic Qualifications:
B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
6+ years of experience in post-silicon, system, hardware, or product validation.
Hands-on experience with SoC/silicon bring-up, functional validation, and system-level debug.
Experience developing and executing validation plans, test cases, and characterization experiments.
Strong Python scripting and test automation skills.
Strong hardware debugging, analytical, and problem-solving skills with the ability to work independently.
Experience debugging issues across hardware, firmware, and software.
Experience validating high-speed interfaces such as PCIe, Ethernet, SerDes, CXL, or DDR.
Hands-on experience working in a hardware or system validation laboratory.
Strong communication and cross-functional collaboration skills.

Preferred Qualifications:
Experience with PVT validation, silicon corner testing, characterization, qualification, and margin analysis.
Experience with server, storage, networking, or AI infrastructure products.
Familiarity with PCIe/CXL architecture and high-speed SerDes technologies.
Experience with oscilloscopes, BERTs, protocol analyzers, traffic generators, or similar lab equipment.
Working knowledge of Python, firmware, Linux, and system-level software debugging.
Experience developing automated validation and regression environments.
Familiarity with Git and software development practices.
Experience with pre-silicon validation, emulation, or hardware prototyping.
Experience with system performance, throughput, latency, power, and stability testing.
This position is open to all candidates.
 
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לפני 3 שעות
Job Type: Full Time
We are We are seeking a Senior Switch Silicon Security Architect to define end-to-end security across switch silicon, firmware, networking protocols, and management stacks. Working with architecture, engineering, and product teams, this role will shape security from early design through validation, manufacturing, and deployment.

What you'll be doing:

Research, design, and drive the implementation of hardware and software security architectures for switch platforms that meet internal requirements, customer needs, and industry standards.

Develop threat models and define end-to-end security architectures for hyperscale networking solutions spanning silicon, firmware, high-performance networking protocols, and management stacks.

Partner across us with hardware, software, research, and product teams to shape the strategic direction of switch silicon and fabric-level security.

Define and drive multi-generation security roadmaps for switch silicon, networking protocols, and fabric-level solutions.

Engage directly with customers to understand their security requirements and translate them into switch silicon and system architectures that address both component and solution-level needs.

Represent us in industry standards bodies and collaborate with external partners to shape emerging security standards and drive interoperability across silicon and networking ecosystems.
Requirements:
What we need to see:

B.Sc., M.Sc., or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.

7+ years of experience in silicon security, SoC architecture, embedded systems security, or a related field.

Proven hands-on experience architecting and implementing hardware roots of trust, secure boot, attestation, secure lifecycle and debug mechanisms, and key provisioning.

Strong foundation in applied cryptography at scale, including hardware trade-offs, PKI, key and identity management, post-quantum cryptography, and encryption technologies.

Hands-on experience architecting secure hardware-firmware interfaces for SoCs and embedded devices.

Deep understanding of high-performance networking protocols and their end-to-end security implications.

Strong communication and influencing skills, with a proven ability to drive initiatives in a fast-paced organization.

Ways to stand out from the crowd:

Experience influencing industry security standards or collaborating with cloud customers and external partners on hardware and end-to-end networking security architectures.

A proven track record of taking innovative security technologies from research and architecture through implementation and deployment in production silicon.

Deep expertise in securing high-performance networking protocols and fabrics, including Ethernet, InfiniBand, and NVLink, with a strong understanding of the switchs role in end-to-end confidential computing and trusted execution environment architectures.
This position is open to all candidates.
 
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4 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a talented Senior Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Senior Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging.
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies.
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market.

System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs.
Ensure rapid cycles from RTL to functional stability through systematic debug approaches.
Own technical blocks and drive them to completion independently.

Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios.
Ensure seamless hardware-software integration for AI infrastructure connectivity.
Collaborate with Design and Verification teams to optimize emulation strategies.
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field.
3+ years of hands-on experience in Emulation at semiconductor companies
Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce).
Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs.
Experience developing and maintaining execution flows for building, running, and debugging emulation models.
"Can-do" approach with ability to own technical blocks and drive them to completion independently.

Preferred Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or related field.
Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis.
Proficiency in scripting languages such as Python or TCL for automation and flow enhancement.
Experience with standard debug environments (e.g., Verdi).
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink).
Background in hardware-software co-verification methodologies.
This position is open to all candidates.
 
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לפני 3 שעות
Location: Yokne`am
Job Type: Full Time
We are looking for a Data Center Network Deployment Engineer to join the Networking clusters solutions HPC/AI Infrastructure team. We are building supercomputers and AI clusters based on groundbreaking technologies. We are looking for a network/system engineer to be a key player to the most exciting computing hardware and software to contribute to the latest breakthroughs in artificial intelligence and GPU computing.

You will work with the latest Accelerated computing and Deep Learning software and hardware platforms, and with many scientific researchers, developers, and customers to craft improved workflows and develop new, leading differentiated solutions. You will interact with HPC, OS, GPU compute, and systems specialist to architect, develop and bring up large scale performance platforms. Does this sound like you? If so, we would love to hear from you!


What you'll be doing:
Deploy, manage and maintain large scale AI Data Centers - control, network and storage stack
Work with multiple software and hardware teams to optimize the clusters networking health and performance
Develop and implement automation scripts for network, compute and storage operations and deployments
Supporting Research & Development activities and engaging in POCs/POVs for future improvements
Requirements:
What we need to see:
B.Sc. in Engineering or CCNP certificate.
8+ years of proficiency in networking fundamentals, configuring ethernet switches, understanding the TCP/IP stack, and data center architecture.
Excellent knowledge of Windows and Linux (Redhat/CentOS and Ubuntu) networking (sockets, firewalls, iptables, wireshark, etc.) and internals, ACLs and OS level security protection and common protocols e.g. TCP, DHCP, DNS, etc.
Proactive individual with the ability to work independently, prioritizing tasks to optimize technology and enhance customer experience.
Provides ad-hoc knowledge transfers, develops handover materials, and offers deployment support for engagements.


Ways to stand out from the crowd:
Combination of interpersonal skills and technical competence.
Knowledge of HPC and AI solution technologies from CPUs and GPUs to high speed interconnects and supporting software.
Experience with multiple storage solutions such as Lustre, GPFS, and newer and emerging storage technologies.
Automation tooling background (Ansible, Salt, Puppet etc.).
This position is open to all candidates.
 
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לפני 3 שעות
Location: Ra'anana and Yokne`am
Job Type: Full Time
We are looking for an Engineering Manager to join our Network System Validation group. You will work on system validating advanced networking solutions across our complex AI cluster environments. The group is a high-performance engineering force that treats validation as a first-class software problem. We build systems, frameworks, and benchmarks that prove our network's correctness and performance at scale. In this role you will lead the validation direction and engineering excellence of one of our technology validation teams. This is a management role for a technology leader who can own the technical roadmap and execution, mentoring a team of high-performance engineers, and push our network to its speed-of-light limits. This role combines the development of methodologies and automation tools with system validation, performance analysis, and investigation of cutting-edge AI networking technologies at scale.

What youll be doing:

Lead, mentor, and coach a team of software development and system validation engineers.

Review system and product requirements, design validation methodologies, develop comprehensive test plans, functional and performance, for networking technologies in large-scale AI cluster solutions.

Develop and maintain benchmarks, automation tools and scripts for test execution, environment setup, log collection, and data analysis.

Lead end-to-end investigation of complex issues by reproducing real-world scenarios, analyzing logs, telemetry, packet captures, and system metrics to identify functional issues and performance bottlenecks, triaging problems across the hardware and software stack, and driving them to root cause and resolution.

Collaborate deeply with software and hardware development teams to debug networking technologies, including NCCL, RoCE, RDMA, and related software components using targeted experiments and code inspection.

Profile and research AI training and inference workloads, correlating application behavior with network and system telemetry to identify scalability and performance limitations.

Document findings, communicate technical results, and continuously improve validation methodologies, automation environments, and engineering processes.

Foster a team culture centered on software quality, accountability, and technical excellence.
Requirements:
What we need to see:

B.Sc. / B.A. in Computer Science, Electrical Engineering, or equivalent experience.

8+ overall years of experience in networking, system validation, or related domains.

3+ years of experience leading software or system development team.

Proven experience debugging complex production systems by forming hypotheses, designing experiments, and driving issues to root cause.

Strong scripting and automation experience using Python, Bash, and/or Ansible.

Ability to read, debug, and reason about C/C++ code (Rust or Go a plus).

Ability to drive technical alignment across teams, communicate tradeoffs clearly, and make high-quality architectural decisions at speed.

Advance AI-driven approaches to test automation: intelligent scenario generation, LLM-augmented root-cause analysis, and autonomous validation pipelines.


Ways to stand out from the crowd:

Experience with large-scale clusters or distributed systems.

Familiarity with NVIDIA networking solutions (ConnectX, SpecX, BlueField).

Background in performance analysis, Kubernetes, or cloud environments.

Background in chaos testing, fault injection, or simulation systems.
This position is open to all candidates.
 
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4 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a talented Principal Emulation Engineer to help build our local engineering powerhouse from the ground up. This is an exciting opportunity to take on meaningful ownership in a new site, implementing the emulation strategy for chips that power the world's largest AI clusters.

As an Principal Emulation Engineer, you will be a core technical driver of our Israel R&D center, working at the intersection of hardware and software to ensure our silicon meets extreme quality and performance targets. You will execute end-to-end emulation flows, bridge the gap between RTL and functional validation, and partner with cross-functional teams to enable seamless hardware-software integration. If you thrive on solving complex technical challenges and want to play a key role in validating cutting-edge AI infrastructure connectivity solutions, this is your opportunity.

Key Responsibilities

Emulation Flow Execution & Implementation
Execute end-to-end emulation flow from high-level model generation and RTL synthesis to complex system-level testing and silicon-accurate debugging
Work directly with next-generation emulation platforms (Zebu, Palladium, or Veloce) to implement cutting-edge methodologies
Maintain and evolve emulation flows to reduce compile times and increase execution speed, directly impacting time-to-market

System-Level Debug & Validation
Drive initial model bring-up process in high-stakes environment, identifying and resolving complex bugs
Ensure rapid cycles from RTL to functional stability through systematic debug approaches
Own technical blocks and drive them to completion independently

Cross-Functional Collaboration
Partner with Firmware, Software, and Validation teams to debug complex system-level scenarios
Ensure seamless hardware-software integration for AI infrastructure connectivity
Collaborate with Design and Verification teams to optimize emulation strategies
Requirements:
Basic Qualifications
Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical field.
10+ years of hands-on experience in Emulation at semiconductor companies.
Deep expertise in emulation flows for large-scale chips using industry-standard emulators (Zebu, Palladium, or Veloce).
Strong background in SystemVerilog for developing, testing, and debugging complex SoC designs.
Experience developing and maintaining execution flows for building, running, and debugging emulation models.
"Can-do" approach with ability to own technical blocks and drive them to completion independently.

Preferred Qualifications
Master's degree in Electrical Engineering, Computer Engineering, or related field.
Familiarity with EDA tools for Lint, Clock Domain Crossing (CDC), simulation, and synthesis.
Proficiency in scripting languages such as Python or TCL for automation and flow enhancement.
Experience with standard debug environments (e.g., Verdi).
Knowledge of high-speed interface protocols (PCIe, Ethernet, CXL, UALink).
Background in hardware-software co-verification methodologies.
This position is open to all candidates.
 
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לפני 3 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies.

We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Enabling new SerDes and Optical Technologies

Implement FW functionality in signal processing units of NVIDIA products

Work closely with the architecture, HW, and SW design teams

Define implement and maintain FW algorithm to control the Silicon

Develop and test FW on emulation & simulation environments during the Pre-silicon phase

Debug and screen HW/FW/SW issues

Take an active part in silicon bring-up and SW development phases

Lead data-driven discussions about the product functionality and areas for improvement
Requirements:
What we need to see:

B.Sc. or M.Sc. in Electrical or Computer Engineering.

2+ years of relevant experience.

Proficient programming in C.

Debugging experience and ability to investigate and triage difficult problems in embedded FW.

Good communication skills and the ability to work with people across several countries.

Excellent English verbal and written communication skills.


Ways to stand out from the crowd:

Proficient in Python and MatLab.

Good understanding of SerDes operation.

Experience with developing the physical layer of communication protocols.

Knowledgeable of Hardware/Software Development Process.

Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.
This position is open to all candidates.
 
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4 ימים
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
As we expand our presence in Israel, we're seeking a visionary Expert IC Package Design Lead to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, leading the physical implementation strategy for chips that power the world's largest AI clusters.

As an Expert IC Package Design Lead, you will be a core technical contributor in the development of advanced IC packaging solutions for high-performance connectivity silicon.
You will own package flow, architecture, design, and qualification from concept through production, working closely with silicon, signal integrity, power integrity, mechanical, manufacturing, and external OSAT partners. You will be responsible for defining package technologies that meet aggressive electrical, thermal, mechanical, and cost targets, enabling our products to operate reliably in the worlds most demanding AI and cloud environments.

Key Responsibilities
Own end-to-end IC package design, from early architecture and feasibility through detailed design, qualification, and high-volume manufacturing.
Define package architecture and technology selection (organic substrates, advanced laminate, interposers, multi-die/chiplet packaging, CoWoS - 2.5D/3D integration).
Lead signal integrity (SI), power integrity (PI), and thermal considerations at the package level for high-speed, high-power devices.
Drive package layout, substrate routing, bump/ball maps, stack-ups, materials selection, and mechanical constraints.
Collaborate closely with silicon design, SerDes, system, SI/PI, and reliability teams to optimize overall product performance.
Interface with OSATs, substrate vendors, and manufacturing partners to ensure design-for-manufacturability (DFM), yield, and cost targets.
Lead package-related risk assessment, failure analysis, and corrective actions during bring-up and production ramp.
Support NPI, qualification, and product sustainment activities, including vendor audits and technical reviews.
Requirements:
Basic Qualifications
10+ years of hands-on IC BIG package design experience for high-performance semiconductor products, with full ownership from concept through tape-out.
Expert proficiency in IC package design tools (Cadence APD / SiP or equivalent) and experience designing complex packages (BGA, FCBGA, FCCSP).
Strong package architecture & integration expertise, including stack-ups, ball/bump maps, constraints, SMT integration, and package BOM ownership.
Deep understanding of signal, power, and thermal integrity at the package level, with ability to drive design tradeoffs based on analysis.
Proven manufacturing and release experience, including DRC/LVS/DFM, OSAT engagement, and delivering production-ready package designs.

Preferred Qualifications
Experience with AI, networking, PCIe, CXL, or other high-speed data center interfaces.
Familiarity with package reliability standards and qualification (JEDEC, IPC, thermal cycling, HTOL, etc.).
Experience supporting chiplet-based architectures and heterogeneous integration.
Prior technical leadership or package ownership on high-volume products.
This position is open to all candidates.
 
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06/09/2026
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are leading a RADAR REVOLUTION, driving a zero-road-fatality reality by enabling truly safe driver-assist systems and paving the way for a fully autonomous-driving future. We are looking for a Customer Support Manager to join our business group. In this role, you will lead our customer-facing technical organization, ensuring successful adoption, integration, and long-term satisfaction of customers using our products. The role combines team leadership, technical oversight, and program governance to deliver a complete whole product solution at scale.

Responsibilities
Lead and manage a team of Application Engineers from different technical disciplines (HW, SW, System).
Own overall customer success across multiple accounts, acting as an escalation point for complex technical and program issues.
Drive high-quality technical support, system integration, and validation activities.
Define and scale support processes, tools, and best practices to support growing customer base.
Ensure delivery of a complete solution (product, documentation, tools, training, and support).
Collect, prioritize, and represent customer feedback to Product and R&D.
Collaborate closely with R&D, Product, Sales, and Operations to align on customer needs and company goals.
Build strong customer relationships and ensure high levels of satisfaction.
Requirements:
Requirements
B.Sc in Electrical Engineering, Computer Engineering, or similar.
7+ years of experience in customer-facing technical roles.
Proven experience leading teams or managing technical/customer support organizations.
Strong understanding of multidisciplinary systems (hardware, software, system-level integration).
Experience working with customers in complex hardware/IC/system environments.
Excellent leadership, communication, and problem-solving skills.
Ability to manage multiple customers, programs, and priorities simultaneously.
High proficiency in English.

Preferred Qualifications:
Experience in Radar / Automotive / ADAS / Communications or similar domains.
Background in ASIC, system architecture, or software architecture.
Experience scaling support organizations in startup or high-growth environments.
Familiarity with system integration, simulation, and validation processes.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8810722
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שירות זה פתוח ללקוחות VIP בלבד
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דיווח על תוכן לא הולם או מפלה
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סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for a Post-Silicon Validation Engineer with strong hands-on experience in PCIe link bring-up, physical-layer debug, and silicon validation. Engineer will work closely with Design, Architecture, Firmware, Software, Engineering teams.

Key Responsibilities
Perform hands-on post-silicon validation
Debug PCIe link issues including link training, LTSSM, equalization, recovery, resets, and link stability.
Analyze PCIe state-machine traces, protocol traces, registers, logs, eye diagrams, and lab measurements.
Drive complex issues from initial failure through root-cause analysis and final resolution.
Work closely with silicon, firmware, software, architecture, and signal-integrity engineers to isolate issues across HW/FW/SW boundaries.
Validate PCIe functionality across different generations, platforms, configurations, and operating conditions.
Develop and execute PCIe validation plans, stress tests, corner-case scenarios, and interoperability tests.
Develop automation to improve validation coverage, debug efficiency, and regression testing.
Requirements:
Required Qualifications
BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or equivalent experience.
5+ years of engineering experience in silicon validation, post-silicon debug, or high-speed interface development.
Strong hands-on knowledge of PCIe architecture and protocol.
Experience working with PCIe analyzers, state traces, registers, logs, eye diagrams, and/or signal-integrity measurements.
Strong problem-solving skills and ability to independently drive issues to root cause.
Experience working across hardware, firmware, and software boundaries.
Good scripting/programming skills, preferably Python
Good Linux knowledge and experience with Linux PCIe debug tools.
Strong communication and collaboration skills.

Preferred Qualifications
Experience with PCIe Gen4/Gen5/Gen6/Gen7
Hands-on experience with PCIe PHY, SerDes, equalization, lane margining, or signal integrity.
Experience with PCIe compliance and interoperability testing.
Experience debugging intermittent, marginal, thermal-sensitive, or corner-case PCIe failures.
Experience with PCIe switches, or networking/accelerator platforms.
Practical experience using AI/ML tools for engineering debug and automation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8831936
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