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Location: Haifa and Tel Aviv-Yafo
Job Type: Full Time
Required CPU Emulation Technical Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next-generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Define the emulation strategy, identify platforms and technologies to support all customers.
Explore emulation methodologies, gather feedback from customers, and implement emulation workflows at scale.
Support emulation customers with debugging hardware, software, tooling, and project-specific issues.
Create tooling and automation to support emulation tools, licensing, and job management in our infrastructure.
Act as a primary interface to emulation vendors.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience working with emulation languages such as C, C++ and scripting such as Python and chip design flow.
Experience in leading an emulation team/project.
Experience in leading technical teams and building cross-functional relationships.
Experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with various emulation technologies (Transactors, In-circuit Emulation, Hybrid), flows (Assertions, Coverage, UPF, Power), Debugging and Performance of compile and runtime environments.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with Field-programmable Gate Array (FPGA) systems (e.g., EP, HAPS, Protium).
Experience with verification techniques, and full verification life-cycle.
This position is open to all candidates.
 
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לפני 2 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Hardware Emulation Technical Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Define the emulation strategy, identify platforms and technologies to support all customers.
Explore emulation methodologies, gather feedback from customers, and implement emulation workflows at scale.
Support emulation customers with debugging hardware, software, tooling, and project-specific issues.
Create tooling and automation to support emulation tools, licensing, and job management in our infrastructure.
Act as a primary interface to emulation vendors.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience in leading/managing an emulation team/project.
Experience with coding and scripting in C or C++ or Python.
Experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with various emulation technologies (Transactors, In-circuit Emulation, Hybrid), flows (Assertions, Coverage, UPF, Power), Debugging and Performance of compile and runtime environments.
Experience in leading technical teams and building cross-functional relationships.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with Field-programmable Gate Array (FPGA) systems (e.g., EP, HAPS, Protium).
Experience with verification techniques, and full verification life-cycle.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Emulation Hardware Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Maintain and upgrade emulation models and infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team and customers, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic design automation (EDA) tools, licensing, and job management in our infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., DDR, Peripheral Component Interconnect Express (PCIe), Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Experience with associated EDA tools, automation, and flow enhancements.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with FPGA systems (e.g., EP, HAPS, Protium).
Experience with hybrid emulation or speed bridges.
Experience with coding in Verilog/SystemVerilog for design.
Experience with design debug tools (e.g., Verdi, Verisium).
This position is open to all candidates.
 
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 4 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Emulation Verification Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Plan and execute the verification of digital design blocks by understanding specifications and working with design engineers to define key verification scenarios.
Develop, execute, and debug full-chip/system on a chip (SoC) tests on emulation platforms.
Collaborate with design engineers to debug tests and ensure functional correctness of design blocks.
Define and implement various coverage measures to capture stimulus and corner-case scenarios. Work with software and post-silicon validation teams to reproduce failures on emulation.
Drive coverage analysis to identify verification gaps and demonstrate progress towards tape-out. Explore new verification and emulation methodologies and implement them.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
8 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools: ASM, C, C++, Perspec, Threadmill, OS, or drivers.
Experience with execution and RTL/firmware/software debug on hardware emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., EP, HAPS, Protium).
Experience with design debug tools (e.g., Verdi, Verisium).
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Preferred qualifications:
Experience in embedded software and firmware (e.g., Linux drivers, firmware validation).
Experience with associated electronic design automation (EDA) tools, automation, and flow enhancements.
Experience with coding in Verilog/SystemVerilog for design.
Understanding of SoC architecture and interfaces (e.g., CPU, DDR, PCIe, interconnect, Ethernet, etc.).
Understanding of register transfer level (RTL) to emulation/field-programmable gate array (FPGA) flows including emulation test benches (e.g., transactors/accelerated verification intellectual properties (VIPs), hybrid, in-circuit emulation).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 23 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Design Verification Vision Lead, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, youll work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive cutting-edge distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
Youll be part of a team that pushes boundaries, developing robust, autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You'll contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the verification of an edge AI IP, to be used in our edge-AI products.
Lead a team of chip verification engineers. Plan tasks, allocate people, hold verification design/code reviews, and drive verification execution.
Plan the verification of digital design blocks, including writing test plans, and other verification documents.
Code development of verification features and capabilities, and participate in RTL debug.
Work closely with Architecture, Software, Design, and Physical Design stakeholders to make technical decisions and represent project status throughout the development process.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
10 years of experience working with hardware verification languages (e.g., System Verilog/Specman), design verification methodologies (e.g., UVM) and chip design flow.
Experience in leading chip verification teams through the full lifecycle from concept to delivery.
Experience in creating chip or subsystem design verification strategies and plans.
Preferred qualifications:
15 years of experience in verification of complex SoC/ASIC.
10 years of experience managing verification teams.
Experience in chip design/verification of high performance AI/ML accelerators.
Experience with industry verification techniques, including complementary techniques such as formal verification, and emulation.
Experience in low power verification.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 1 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Generalist III
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Define, develop, and execute post-silicon validation test plans on both pre-silicon emulation setups and physical silicon platforms in the lab.
Lead the bring-up of silicon, troubleshooting and identifying root causes of complex hardware and software issues.
Work closely with Architects, Design Engineers, Firmware/Software developers, and production teams to drive bug fixes and ensure feature functionality.
Provide comprehensive functional coverage for our custom designs, driving the transition from a prototype chip to a fully realized product deployed globally.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience in embedded code development (e.g., C/C++ or Python).
Experience in Double Data Rate (DDR) PHY or Memory Controller (MC) post-silicon validation activities.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with functional tests for silicon validation, bring-up, characterizing, and qualifying silicon.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Test Generator Technical Lead, Hardware, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
You will have the opportunity to find the perfect blend of software design practices and hardware development complexity. As a Test Generator Technical Leader, you will lead the technical development and methodology of advanced pseudo-random test generators and verification tools for our custom silicon (ASIC/SoC). You will work at the intersection of hardware and software, driving the strategy for stimuli generation, constraint-solving, and test automation to ensure the functional correctness of next-generation chips. Your strength is primarily in software coding with a good understanding of hardware, or if you are a hardware engineer with software proficiency, this balanced role will let you shine in both disciplines at the same time.Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Lead the technical design, architecture, and implementation of high-performance test generators and verification frameworks (e.g., using C++, Python, SystemVerilog, or Universal Verification Methodology (UVM).
Propose, design and implement software automation that directly addresses bottlenecks in today's ASIC and SoC Electronic Design Automation (EDA) flow, specifically targeting pseudo-random stimuli generation and constraint-solving methodology.
Collaborate directly with the hardware team on projects to prototype and then deploy scalable test generator tools to make a positive impact on our chip hardware development process.
Participate in, or lead design reviews with peers and stakeholders to decide amongst available technologies for advanced verification.
Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, simulation performance, or service operations and quality.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with software development in one or more programming languages with experience in data structures and algorithms.
Experience in hardware verification, building developer tools, or developing test generators/exercisers for ASICs and SoCs.
Experience testing, maintaining, or launching software/hardware products.
Experience with software design and architecture, including leading technical projects.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with high-performance, systems, and debugging.
Experience with Hardware Verification languages and methodologies (e.g., SystemVerilog, UVM).
Experience in chip design and related EDA tools and flows (e.g., VCS, Xcelium, debugging complex hardware-software interactions).
Deep understanding of object-oriented programming, constraint solvers, and software design architecture.
Software skills and design practices, with the ability to bridge the gap between software engineering and hardware verification disciplines.
This position is open to all candidates.
 
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior SoC and IP Design Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
Perform Register-Transfer Level (RTL) coding (coding and debug in Verilog, SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure activities.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.
Experience with design sign-off and quality tools (e.g., Lint , CDC , etc.).
Experience with SoC or IP architecture.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Knowledge of high-performance and low-power design techniques, assertion-based formal verification, Field-programmable Gate Array (FPGA) and emulation platforms, and SoC architecture.
Knowledge in one of the following areas such as Double Data Rate (DDR)/Low Power Double Data Rate (LPDDR), High-bandwidth memory (HBM).
Excellent problem-solving and debugging skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 23 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Formal Verification Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission at System Infrastructure is to build the best cloud in the world for our services and for our Cloud customers, by solving real world business issues of performance, cost, and scale, utilizing hardware, software, and system solutions. To better serve evolving cloud needs, We are establishing a team in Israel to develop custom chips for servers.
In this role, you will perform formal verification of design properties of complex ASIC designs. You will collaborate closely with design and verification engineers to define meaningful properties that capture the design intent of a logic block and constraints on its input stimulus. You will also help define and improve design and verification methodologies that allow you to achieve formal verification closure.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of our AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for complex digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Resolve difficult to verify properties. Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
8 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience capturing design specification in a temporal assertion language such as SVA or PSL.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering or Computer Science.
2 years of experience working on main interconnects, Direct Memory Access (DMA), controllers, and power management.
Experience working with one or more formal verification tools, such as JasperGold, VC Formal, Questa Formal, or 360-DV.
Understanding of formal verification algorithms.
Proficiency with scripting languages, such as Python.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8717568
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 23 שעות
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Test and DFT Engineer, Cloud
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Haifa, Israel; Tel Aviv, Israel.
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.The AI and Infrastructure team is redefining whats possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
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Requirements:
Minimum qualifications:
Bachelor's degree in Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, automatic test equipment (ATE) program development, and post-silicon enabling from new product introduction (NPI) through high-volume manufacturing.
Experience with ASIC test methodologies (MBIST, ATPG, DFT, SerDes, and sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required AI SoC Design Verification Engineer, Cloud

About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining what’s possible. We empower our customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. 
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Tel Aviv, Israel; Haifa, Israel.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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