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לפני 2 שעות
Location: Caesarea
Job Type: Full Time
Required Electrical Post-Silicon Characterization & Validation Engineer
Meet the Team:
The Silicon One Post-Silicon Electrical Validation (EPSV) team in Caesarea works on the fastest, most power-hungry networking chips in the industry. We are the hardware experts who take the raw silicon and prove it actually works in the real world. We don't just run scripts from a desk-we get our hands dirty in the lab physically probing boards and testing the limits of the hardware. Love sophisticated hardware puzzles? Want your work to directly impact mass production? This is the team to be in.
Your Impact:
Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.
Why Join Us:
Be part of a team working on the most advanced silicon products in the market! Are you an engineer who prefers physical testing and measuring boards in the lab over just running validation scripts on a computer?, This is the place for you!. We value pure hardware talent and provide ample opportunities for professional advancement.
Requirements:
Minimum Qualifications
B.Sc. in Electrical or Computer Engineering.
6+ years of experience in post-silicon validation, characterization, or hardware testing.
Experience testing and measuring boards using scopes, VNAs, TDRs, and phase noise analysers.
Experienced in bringing up ASICs on EVBs, specifically with SerDes and DC/DC channels.
Ability to write automated scripts for hardware testing and data analysis.
Preferred Qualifications:
System-level Debugging- trace bugs across the silicon, package, and PCB.
Good understanding of signal and power integrity (jitter, supply noise).
Experience using validation data to fix performance bottlenecks and improve production flow.
Track record of working smoothly with global teams from architecture through to physical design and DFT.
Strong technical ownership, independent problem-solving, and direct, data-driven communication.
This position is open to all candidates.
 
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8717235
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לפני 5 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Required PHY Firmware Technical Leader
Meet the Team:
Join the Silicon One PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.
We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.
We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.
Your Impact:
Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies
Who Youll Work With:
The Silicon One group, the center of our ASIC design efforts
Cross-functional teams including silicon design, firmware, and system
Global teams working together to deliver game-changing networking devices.
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university
8+ years of relevant experience in system and firmware.
Strong system-oriented mindset with a multi-disciplinary approach
Ability to work on complex problems while multitasking across domains
Preferred Qualifications:
Experience with C++, Python.
Familiarity with processor architecture
Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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8716722
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לפני 3 שעות
Location: Caesarea
Job Type: Full Time and Hybrid work
Required PHY Post Silicon Validation Engineer
What You'll Do
Youll be joining the post silicon validation team in PHY system group at Silicon One group as part of the silicon development
Our team deals with PHY and system aspects of the SerDes communication IP: PHY FW, calibrations, system definitions and operations and post-silicon validation including developing the automation infrastructure and tools.
We use latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Who You'll Work With:
You'll be part of our Group driving our game changing next generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporation. The position includes hands on work in our lab in Caesarea and Netanya.
Our design center is unique - hosting all silicon HW and SW development disciplines inside one site.
We are transforming the industry and building a new internet for the 5G era, providing a unified, programmable silicon architecture that is the foundation of all our future routing products.
Our devices are designed to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.
We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine!
Requirements:
Minimum Requirements:
* B.Sc/ M.Sc in Electrical engineer / Computer Science
* Experience with C++/C#, Python
* Knowledge in post-silicon validation or automation for networking systems specifically for DSP-based silicon systems, including debugging, validation, and optimization of DSP architectures.
Preferred Qualifications:
* Knowledge in communication and signal processing
* Knowledge in Linux, Git, Data Bases
* Knowledge in development of GUI
* experience with Jenkins Devops environment
* System orientation with multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8717080
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לפני 2 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
3+ years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8717229
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 2 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. Our Silicon One is a transformative technology set to serve our customers and end-users for decades to come.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8717238
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 4 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Required Logic Design Engineer
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.
Requirements:
Minimum Qualifications
B.Sc./M.Sc. in Electrical Engineering from a top university
6+ years of experience in a relevant field
RTL design experience
Familiarity with UVM and functional verification methodologies
Preferred Qualifications
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with Clock Domain Crossing (CDC).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8716731
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 3 שעות
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.
Meet the Team:
Youll collaborate with top industry engineers within the fast-growing Silicon One group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a global, leading corporation.
Our design center is unique, hosting all silicon hardware and software development fields under one roof. Our Networking Chips deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. They are strategically placed in critical AI infrastructure, powering next-generation network devices and supporting advanced AI workloads. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Your Impact:
Spearhead innovative silicon architecture for AI infrastructure, guiding board design from concept through to mass production.
Act as the technical decision-maker for the project and collaborate with cross-functional teams in mechanics, thermal, PCB layout, and software/RTL.
Define product specifications, develop electrical schematics, and guide component selection.
Conduct hands-on testing in a lab environment and drive the PCB bring-up, characterization, and debugging stages.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering or equivalent practical experience.
3+ years of experience as a hardware/board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed and multi-layer PCB design.
Hardware-oriented, with experience in measurements, characterization, and using lab equipment and hands-on experience in PCB bring-up and systematic debugging.
Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8717122
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 3 שעות
Location: Caesarea
Job Type: Full Time and Hybrid work
Required Senior Asic Design - Silicon One
Job Description
Meet the Team
Join the Silicon One Front-End Design team, at the core of our silicon development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.
Your Impact:
Write and review micro-architecture specifications
Implement RTL (Verilog/SystemVerilog) to meet timing, performance, and power requirements
Contribute to full chip integration, timing methodology, and analysis
Collaborate with verification engineers to resolve bugs and achieve coverage closure
Work with the physical design team to close timing and PnR issues
Support design methodology evolution and best practices
Perform debug, root-cause analysis, and post-silicon validation in the lab.
Requirements:
Minimum Qualifications:
B.Sc./M.Sc. in Electrical Engineering from a top university
RTL design experience
Familiarity with UVM and functional verification methodologies
Preferred Qualifications:
Experience with MATLAB simulations and bit-exact modeling environments
Familiarity with mixed-signal systems and environments
Knowledge and hands-on experience with Clock Domain Crossing (CDC).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8717051
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 4 שעות
חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
We are looking for an experienced Design Verification engineer to join our DFT team and help establish and grow DFT DV activity in the SiliconOne DFT team. This role is relevant for engineers with experience in DV roles, either in DFT DV or in other verification domains, who are interested in becoming familiar with DFT design, verification methodologies, and the challenges of validating testability features in advanced silicon.
Your Impact
Establish and drive DFT verification activities within the SiliconOne DFT team.
Develop verification plans, environments, checkers, assertions, and coverage models for DFT features.
Verify DFT architecture and implementation in close collaboration with DFT, design, architecture, and verification teams.
Work on verification of scan, MBIST, IJTAG/JTAG, test access mechanisms, DFT controllers, and related SoC-level test features.
Debug complex pre-silicon issues across RTL, verification environments, and DFT logic.
Contribute to scalable methodologies, reusable verification components, and best practices for DFT DV.
Help bridge between general DV methodologies and DFT-specific design and verification needs.
Requirements:
Minimum Qualifications
B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, or a related field.
5+ years of experience in design verification roles.
Strong experience with SystemVerilog and UVM-based verification environments.
Experience developing verification plans, coverage models, assertions, and debug flows.
Strong communication skills and ability to work closely with cross-functional teams.
Motivation to learn DFT concepts and become a key contributor in the DFT DV domain.
Preferred Qualifications
Experience with DFT DV, including verification of scan, MBIST, JTAG/IJTAG, ATPG-related logic, or test controllers.
Familiarity with DFT concepts such as scan insertion, memory BIST, ATPG, boundary scan, and silicon test flows.
Experience with complex SoC verification, networking silicon, or high-performance AI-driven silicon.
System-level understanding of large-scale chip architecture and integration.
Ability to build new methodologies and establish verification activity from the ground up.
High attention to detail, ownership mindset, and willingness to grow into new technical domains.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8716874
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 2 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
We are seeking a Physical Design Engineer.
Meet the Team:
The Physical Design team within Silicon One owns backend methodology and flow development from RTL to GDS. The team plays a critical role in developing high-quality VLSI designs for some of our most advanced silicon products.
We work with the latest silicon technologies and processes to build large-scale, complex devices that push the boundaries of feasibility. You will collaborate with experienced engineers across architecture, design, verification, and implementation to deliver high-performance silicon.
Your Impact:
You will be part of the Silicon One team, which is at the heart of our software and ASIC design efforts. As a Physical Design Engineer, you will contribute to backend implementation work across key stages of chip design, helping move complex designs from RTL toward GDS.
You will work on physical synthesis, place and route, optimization, timing closure, and floor planning activities. Success in this role means delivering high-quality implementation results, learning quickly from senior engineers, and helping improve the flow and methodology used by the team.
Contribute to physical synthesis, place and route, optimization, and timing closure for complex VLSI designs.
Support design floor planning and implementation planning in collaboration with senior physical design engineers.
Analyze timing, congestion, power, area, and design-rule issues and help drive them toward closure.
Work with physical design verification flows, including LVS and DRC, to support clean implementation handoff.
Partner with cross-functional teams to debug implementation issues and improve backend flow quality.
Requirements:
Minimum Qualifications:
B.Sc. or M.Sc. in Electrical Engineering or a related field.
2+ years of hands-on experience in VLSI backend design or a relevant physical design domain.
Strong understanding of the Place & Route flow.
Hands-on experience with physical synthesis, place and route, optimization, timing closure, or design floor planning.
Preferred Qualifications:
Understanding of physical construction and integration concepts across backend implementation.
Knowledge of physical design verification methodology, including LVS and DRC.
Familiarity with physical design EDA tools such as Synopsys, Cadence, or similar platforms.
Ability to learn independently, take ownership of assigned tasks, and work effectively with teammates.
Strong problem-solving skills and attention to detail in complex technical environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8717221
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 3 שעות
Location: Caesarea
Job Type: Full Time and Hybrid work
Required Junior Hardware Engineer - Signal & Power Integrity - Israel - ETR
Location:Caesarea, Israel
Job Description
Please note this posting is to advertise potential job opportunities. This exact role may not be open today but could open in the near future. When you apply, a representative may contact you directly if a relevant position opens.
What You Will Do:
You'll be joining our Silicon One Signal & power Integrity team, which is at the center of the silicon development. Our SIPI engineers deal with all system development aspects and deliver detailed specifications to other development team. As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.
Requirements:
Minimum Qualifications
B.Sc or M.Sc Electrical Engineer graduate from leading Israeli Universities with average grades above 85.
Physics background.
Brilliant ambitious and motivated individual, regardless of previous experience.
Team players who enjoy big challenges.
People who can quickly ramp on multiple, interdisciplinary domains.
Preferred Qualifications:
Experience in ASIC package design, including optimizing pinouts, stack-ups, and high-speed routing.
Knowledge of silicon floor planning, signal integrity (SI), and power integrity (PI) considerations.
Hands-on experience with advanced testing and measurement equipment, including oscilloscopes and TDR/VNA analyzers.
Strong understanding of high-speed signal design and power distribution networks (PDN).
Experience in package design.
This position is open to all candidates.
 
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