דרושים » חשמל ואלקטרוניקה » physical design power optimization engineer

we are looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
you will be responsible for chip floorplan and pin placement, ensuring integration within our innovative builds.
we expect you to run, debug, and approve physical verification flows across multiple projects, ensuring strict adherence to our high standards.
you will perform physical layout implementation, planning and optimization, contributing to the development of our groundbreaking chips.
we are widely considered to be one of the technology worlds most desirable employers. we have some of the most forward-thinking people in the world working for us. are you a creative and autonomous engineer who loves a challenge? are you ready to become the engineer you always wanted to be? come and be part of the best physical design team in the industry!

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:
You will be responsible for complex physical design unit designs, ensuring integration within our innovative builds.
We expect you to run, debug, and approve PnR and verification flows across multiple projects, ensuring strict adherence to our high standards.
You will perform physical design implementation, planning and optimization, contributing to the development of our groundbreaking chips.

we are looking for best-in-class physical design engineers to join our outstanding networking silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.
what you'll be doing:
perform advanced static timing analysis (sta) for hsio at chiplet and fc level.
running prime time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
identify convergence risks and work closely with physical design, rtl and dft teams, ensuring convergence throughout various project stages.
responsible for a full timing closer and quality approval from pre-layout sta model through signoff.
ai use for timing optimization and data analysis.

we are now looking for best-in-class senior chip design Verification engineer to join our outstanding network adapter silicon group, developing the industry's best high-speed smart communication devices, data processing unit (dpu), delivering the highest throughput and lowest latency! come and take a significant part in verifying and designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company. 
what you'll be doing:
work in a verification team which develops some of the networking silicon core units.
build reference models, verify and simulate chip blocks/entities according to specifications under challenging constraints with high orientation to performance.
gain a strong understanding of chip micro-architecture and features, and develop the verification environments.
work closely with multiple teams within organizations such as architecture, micro- architecture, and fw.

our team in israel is looking for a dedicated chiplet sta owner to join us in defining the next era of ai's networking. this is an outstanding opportunity to work with innovative technology and collaborate with some of the most experienced minds in the industry. if you are ambitious, passionate about flawless design, and eager to make a lasting impact, this role is perfect for you!
what you'll be doing:
perform advanced static timing analysis (sta) at chiplet and fc level.
running prime time, review and debug timing paths, understand constraints, sdc generation, timing ecos generation.
identify convergence risks and work closely with physical design, rtl and dft teams, ensuring convergence throughout various project stages.
responsible for a full timing closer and quality approval from pre-layout sta model through signoff.

we are now looking electrical engineers who like to see the big picture of high-end optical transceiver design. this role will give you a rare opportunity to craft and deliver a new class of products, aimed at delivering data at incredible speeds, using high end solutions to lead the world of high-speed optical communication to new extremes. 
what you'll be doing: 
detailed design of the electrical schematics in the product, board design and components selection. 
leading the product multi-discipline design in all fields including work with thermo-mechanical, signal/power integrity, software, and optics teams and more. 
hands on lab work to bring to design to life, evaluate and improve the product performances. 
work with multiple operational groups inside and outside the company such as qualification, suppliers, and manufacturers to scale the product from lab to mass production high runner. 
learning to use new technologies to enable improvement for generation to generation.

widely considered to be one of the technology worlds most desirable employers, our company is an industry leader with groundbreaking developments in high-performance computing, artificial intelligence and visualization. the gpu, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. our work opens-up new universes to explore, enables amazing creativity and discovery and powers what were once science fiction inventions from artificial intelligence to autonomous cars.
 
the senior power design engineer will be responsible to design our datacenter products such as switches, adaptors and electro-optical cables. in this role you will be responsible for all aspects of product from definition, design to execution. continuously renewing your academic foundation, validated by active exposure of industry experience. interact closely with company experts and become an integral member of a global collaborative team. join us and be a part of this fast paced, dynamic environment!
 
what you will be doing:
design datacenter system power solutions, such as switches, adapters and electro-optical cables.
perform validation of system power solutions.
design power solution TEST platforms.
collaborate, provide feasibility analysis, present options and review of odm power solutions.
execute system power bring-up and debugs.
define system power testing specifications.
engage with vendors to resolve system power issues.

we are looking for a formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of core technology.
learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

we are looking for a power u-arch senior engineer. our company is known as a world leader in providing energy-efficient high-performance products and we continue to invest in the research and development of hyper-efficient SOC architectures. we are continually innovating in creative and unrivaled ways to improve our ability to deliver exceptional perf/watt solutions in a wide range of sectors and verticals. come join our applied power team to develop state of the art dpu products.
what you'll be doing:
lead a micro-architecture of power features such as: power management, logical power features, etc
work with dpu arch team on power features definition.
understand the workload characteristics for dpu workloads at system scale to drive new hw/sw features.

we are looking for best-in-class senior full-chip Verification engineer to join our networking silicon team. in this role, you will be responsible for the development and verification of our next-generation nics at the system level. you will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the worlds most advanced data centers, enjoy working in a meaningful, growing environment where you make a huge impact in a technology-focused company.
what youll be doing:
full-chip verification & execution: own complex system -level features by defining verification plans and driving the end-to-end execution.
system -level debug & analysis: gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
cross-team collaboration: work closely with multiple teams within organizations such as architecture, u-arch, firmware and all units inside the nic
ai-enhanced development: accelerate development by leveraging cutting-edge ai coding tools and frameworks.