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לפני 5 שעות
חברה חסויה
Location: Caesarea
Job Type: Full Time
We are looking for a hands-on, experienced Physical Design Engineer to join us and help define and implement next-generation AI SoC in an advanced technology node

You will play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.
What Youll Do

Take part in shaping methodology and best practices in advanced technologies

Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff

Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification

Define and optimize static timing constraints, area, and power goals at block and top levels

Take part in flow development and automation to improve efficiency and quality of results
Requirements:
At least 3+ years experience with RTL2GDS flow

BSC/MSC in Electrical/Computer engineering

Deep understanding on STA principals, synthesis, and P&R flow

Solid experience in physical verification and advanced process nodes
This position is open to all candidates.
 
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לפני 4 שעות
חברה חסויה
Job Type: Full Time and Hybrid work
Our group is responsible for the development of the company next generation SOC for AI Networking Compute. The development starts from product definition through architecture, design, verification and up to implementation.

The complex SOC is a high-performance device running AI scale-out for inference workloads computer for vision and audio processing, with technologies from multi-disciplines.
In this position you will have end-to-end responsibility for all design flow. In this position you will be responsible for full cluster/block uarch, design, initial synth, lint, integrating and supporting PD, DFT and verification.

If you are curious, innovative, have strong technical skills with a hands-on approach, and understand the full design, system view and SW integration requirements, this position is for you!
Requirements:
7+ years of experience as a VLSI design engineer
B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
Experience in defining uarch and design of complex design units.
SOC design experience.
full cluster/block uarch, design, inital synth, lint, integrating and supporting PD, DFT and verification.
Advantages

Experience in HW implementation of packet processing / Ethernet / Infiniband / RDMA Experience in high-speed interfaces DDR/PCIe - great advantage!
Leading VLSI teams/projects
Verification experience and knowledge with SV/UVM
CPU subsystem multi-core designs experience
Experience with Synthesis and STA analysis
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
We are seeking a CAD Engineer to join the Physical Design team.

You'll be joining our Physical Design team within us, which is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

Our Backend Engineers handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.

You will be the tech lead for CAD within the team, leveraging your extensive backend and physical design experience to drive the development, optimization, and innovation of CAD methodologies and tools, ensuring the highest quality and efficiency in our chip design flows from RTL to GDS.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.
Requirements:
Minimum Qualifications:
A VLSI Design Engineer with extensive experience in backend design.
B.Sc./M.Sc. in Electrical Engineering or Computer Engineering with relevent background.
5+ years of hands-on experience in a relevant domain.
Strong understanding of Place & Route flow.

Preferred Qualifications:
Deep understanding of Physical construction and Integration.
Knowledge of Physical Design Verification methods like LVS/DRC and formal verification.
Experience with PD CAD and Physical Design EDA tools (e.g., Synopsys, Cadence).
Ability to support technology adoption and new tool integration.
Great teammate, self-learner, and able to work independently.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Physical Design team within us is responsible for the entire backend methodology and flow development from RTL to GDS. This is a critical part of the group leading the development of high-quality VLSI designs.

We demonstrate the latest silicon technologies and processes to build the largest-scale and most complex devices, pushing the boundaries of feasibility.

Your Impact
You'll be part of the team, which is at the heart of our software and ASIC design efforts.

You'll handle all aspects of chip design, including Definition, Physical Synthesis, Place and Route, Optimization, Timing Closure, Design Floor Planning.
Requirements:
Minimum Requirements:
A VLSI Design with extensive experience in backend design.
B.Sc./M.Sc. in Electrical Engineering.
Strong understanding of Place & Route flow.
7+ years of hands-on experience in a relevant domain

Preferred/Advantageous Qualifications:
Deep understanding of all aspects of Physical construction and Integration.
Knowledge in Physical Design Verification methodology LVS/DRC.
Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).
Great teammate, self-learning skills, and ability to work autonomously.
This position is open to all candidates.
 
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Location: Caesarea
Job Type: Full Time
We are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.
Responsibilities
Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered)
Self-motivated, ability to work, lead and drive tasks to completion.
Great interpersonal skills.
Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, and Unix/Linux environments, scripting languages (Python, etc.) and version control.
Advantages
Knowledge in Low Power technics and UPF standard.
Knowledge with Mix signals SoCs.
Knowledge with SW/HW Co-development.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
Required Logic Design Engineer
Responsibilities
Design and implement complex digital circuits for ultra low-power SoC.
Participate in all phases of SoC design, from specification to coding, debug and tape-out.
Perform RTL design, synthesis, and timing analysis.
Optimize designs for power, performance, and area (PPA).
Collaborate with cross-functional teams, including architecture, System, Software, Analog, verification, and physical design engineers.
Contribute to the development of design methodologies and best practices.
Debug and resolve design issues.
Support Lab bring ups, debug and other activities.
Requirements:
Bachelor's Or Master's degree in Electrical Engineering, Computer Engineering, or a related field
Minimum 5 years of experience in logic design, working in both IP and SOC environments
Proficiency in Verilog or SystemVerilog for design
Experience with industry-standard EDA tools (Synopsys VC, Cadence etc)
Knowledge in low power design techniques
Knowledge of RTL synthesis and timing analysis flows
Strong communication and teamwork abilities
Excellent problem-solving and debugging skills
Advantage
Experience with Analog ICs, Mix-signals design, and Lab equipment
Experience with RISC-V based SoC and FW.
This position is open to all candidates.
 
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
You'll be joining the Israeli team which is the core center of our SW and ASIC design. You'll be part of the group driving our groundbreaking next-generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporate and develops the full software stack enabling the Silicon One ASICs. Join a team of dedicated engineers with a proven track-record at delivering breakthrough products. Our R&D center is outstanding - hosting all silicon HW and SW development teams inside one site. We are transforming the industry and building a new AI/ML Networks, as well as providing a unified, programmable silicon architecture that is the foundation of all our future routing products. Our devices are crafted to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed (50+ Terabits per second) without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine! You have a unique opportunity to join the core center of our SW development and work with us to design and deliver breakthrough technologies

What You'll Do:

You'll be joining our Physical Design team, which is at the center of the silicon development. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.

We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Requirements:
Minimum Qualifications:

B.Sc or M.Sc Electrical Engineering or Computer Engineering graduate from leading Israeli Universities.

GPA above 87 (Please attach your grade sheet when applying to expedite the recruitment process).

You are an ambitious and motivated individual, who enjoys big challenges and can quickly ramp on multiple domains.
This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Join the Front-End Design team, at the core of our development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.

Your Impact:

Review micro-architecture specifications.

Implement Verification environment UVM based.

Collaborate with Design engineers to resolve bugs and achieve coverage closure.

Work with the firmware/Lab teams to verify chip flows.

Perform debug, root-cause analysis, and post-silicon validation in the lab.
Requirements:
Minimum Qualifications:

B.Sc./M.Sc. in Electrical Engineering from a top university.

3+ years of experience in the filed.

knowledge with UVM and functional verification methodologies.


Preferred Qualifications:

Experience with MATLAB simulations and bit-exact modeling environments.

Familiarity with mixed-signal systems and environments.

Knowledge and hands-on experience with Clock Domain Crossing (CDC).
This position is open to all candidates.
 
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1 ימים
חברה חסויה
Location: Caesarea
Job Type: Full Time
The company`s Factory Applications group is looking for a highly motivated, energetic, and self-driven engineer to join our Silicon Photonics product team. You will work on projects collaboratively with cross-functional teams across the company, as well as develop imaginative, thorough, and practical application solutions separately.

In this position, we are looking for someone who can leverage their experience into a multifaceted technical leadership role - being an expert in our products for outbound activities, and representing the broad user base for inbound new product development.

In this position you will work at our office in Haifa, Israel.

Responsibilities:
Leading member of product development teams with engineering, representing the broad user base -defining use cases and requirements, and performing post-implementation validation. Responsibility is to ensure we are implementing the right things to meet market expectations with competitive solutions.
Participate in key-design-ins acting as expert consultant, ensuring technical success, at times taking on the role of project technical leader.
Provide expert guidance to our field applications and direct customers in development of successful test solutions.
Develop and deliver technical marketing presentations with clear and effective messaging.
Co-develop user documentation and training for new products and features.
Continually develop deep expert knowledge of our products and use models.
Continually develop knowledge of semiconductor/Silicon Photonics test requirements and trends.
Develop strong relationships with worldwide account teams and key customers.
Develop knowledge and expertise on semiconductor device testing.
Develop knowledge and expertise on Automated Test Equipment (ATE) - specifically the UltraFLEXplus family of our testers - with a focus on our Silicon Photonics and Software product area, with addition of Digital, Serial and DC products as projects require.
Support customers on tester operation and capability.
Requirements:
Experience:
Bachelor or higher degree in EE or related fields.
Experience >8 years in a related technical field.
Strong understanding of electrical engineering fundamentals (Silicon Photonics, digital communications and signal processing, power delivery, signal processing, RF device technology and testing a plus).
Proficient with general software programming (preferred .NET - C#, VB and Python) and common algorithms.
Basic knowledge about semiconductor device design, manufacturing, and/or testing is a plus.

About you:
Strong analytical and problem-solving skills.
Ability to work effectively both within a team and on your own - planning, execution, tracking, and reporting.
Strong interpersonal and relationship-building skills - a commitment to teamwork and can-do spirit.
Strong written and verbal communication skills in English. Ability to develop and deliver clear and effective presentations on complex topics.
Can work under high pressure with a positive and enthusiastic attitude.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.

Youll collaborate with top industry engineers within our fast-growing group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.

Your Impact:
Spearhead innovative switch system design, guiding the process from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.

Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Join the PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.

We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.

Your Impact:

Develop PHY firmware and system-level features for advanced networking ASICs.

Design and implement PHY calibrations and system definitions.

Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis.

Collaborate closely with PHY, system, firmware, and silicon design teams.

Contribute to defining system operation modes and end-to-end device behavior.

Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies.
Requirements:
Minimum Qualifications:

B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university.

3+ years of relevant experience in system, PHY, firmware, or silicon-related development.

Strong system-oriented mindset with a multi-disciplinary approach.

Ability to work on complex problems while multitasking across domains.


Preferred Qualifications:

Background in communications and signal processing.

Hands-on lab experience (bring-up, measurements, validation).

Experience with C++, Python, and MATLAB.

Familiarity with PHY systems, calibrations, or post-silicon validation.

Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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