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Location: Caesarea
Job Type: Full Time
In this role, you will be part of the Switch ASIC Post-Silicon Electrical Validation (EPSV) team.
Ensure the ASIC operates according to specifications and reliably over time by performing extensive, high-precision measurements using advanced test equipment and procedures.
Conduct deep-dive investigations, integrating knowledge across hardware, software, and system domains to identify root causes of observed device behavior.

Handle all chip validation aspects, including:
Building validation plans.
Performing EPSV using advanced test and measurement equipment.
Writing tests in Python over device SDK.
Executing tests and analyzing results.

You will gain in-depth knowledge of chip architecture, functionality, and operating modes, enabling you to debug and resolve electrical chip-related issues.
Requirements:
Minimum Qualifications:
Bachelors degree in Electrical or Computer Engineering.
At least 3 years of experience in hardware or post-silicon validation.
Hands-on experience with lab equipment performing high-speed, clock, and precise voltage measurements.
Knowledge of high-speed interfaces and high-power DC/DC design.

Preferred Qualifications:
Experience bringing up ASICs on EVBs with Board Design, FPGA, SerDes, and Software teams.
Proficiency in debugging issues in the lab using VNA/TDR, oscilloscopes, and phase noise analyzers.
Experience developing testing environments, performing validation activities, and analyzing data.
Familiarity with production testing and yield improvement.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Join the PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.

We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.

Your Impact:

Develop PHY firmware and system-level features for advanced networking ASICs.

Design and implement PHY calibrations and system definitions.

Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis.

Collaborate closely with PHY, system, firmware, and silicon design teams.

Contribute to defining system operation modes and end-to-end device behavior.

Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies.
Requirements:
Minimum Qualifications:

B.Sc. or M.Sc. in Electrical Engineering or Computer Science from a top university.

3+ years of relevant experience in system, PHY, firmware, or silicon-related development.

Strong system-oriented mindset with a multi-disciplinary approach.

Ability to work on complex problems while multitasking across domains.


Preferred Qualifications:

Background in communications and signal processing.

Hands-on lab experience (bring-up, measurements, validation).

Experience with C++, Python, and MATLAB.

Familiarity with PHY systems, calibrations, or post-silicon validation.

Experience working in cross-functional, fast-paced development environments.
This position is open to all candidates.
 
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חברה חסויה
Location: Caesarea
Job Type: Full Time
We are seeking a HW Board Design Engineer.

Youll collaborate with top industry engineers within our fast-growing group worldwide.
You will be part of a team driving our groundbreaking next-generation network devices. Our team operates in a startup-like atmosphere within a stable and leading corporation.
Our design center is unique, hosting all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry and building a new internet for the 5G era, with a unified, programmable silicon architecture that will be the foundation of all our future routing products.
Our devices are designed to be adaptable across service providers and web-scale markets, crafted for both fixed and modular platforms. They deliver high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility. We are a transformative technology set to serve our customers and end-users for decades to come.

Your Impact:
Spearhead innovative switch system design, guiding the process from concept through to mass production.
Collaborate with cross-functional teams in areas such as board design, mechanics, thermal, PCB layout, production, software/firmware, RTL, and more.
Act as the technical focal point and decision-maker for the project.
Conduct hands-on testing in a lab environment and support production and qualification stages.
Define product specifications, develop electrical schematics, and guide component selection and layout processes.
Requirements:
Minimum Qualifications:
B.Sc. in Electrical Engineering from a leading academic institution.
4 years of experience as a board design engineer, with a strong background in executing complex hardware projects.
Experience in high-speed designs and multi-layer PCB design.
Hardware-oriented, with experience in lab work (measurements/characterization, lab equipment).
Hands-on experience in PCB bring-up and debugging.

Preferred Qualifications:
Demonstrated success in leading multi-disciplinary projects.
Strong project management abilities, self-driven, with excellent interpersonal skills.
System orientation with a multi-disciplinary approach and multitasking capabilities.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Join the PHY system team, a pivotal part of our development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

Key responsibilities include:

Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

What Youll Do:

Youll be part of the group driving next-generation network devices within a startup-like atmosphere inside a well-established, leading corporation.

Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Requirements:
Minimum Qualifications:

Education:
B.Sc/M.Sc in Electrical Engineering or Computer Science from a top university.
5+ or more years of relevant experience required
System Orientation: Strong multi-disciplinary approach with multitasking capabilities.
Major Advantage: Specialization in Communication and Signal Processing.
Experience: Hands-on experience with lab work is advantageous.
Technical Skills: Proficiency in C++, Python, and Matlab is a plus.

Preferred Qualifications:

Varies based on the team and business needs.

Preferred Qualifications are desired education E.

Experience, and skills that are in addition to Minimum Qualifications.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8546269
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Location: Caesarea
Job Type: Full Time
The HW Board Design team is at the heart of our hardware development lifecycle, ensuring that every design is robust, testable, and ready for high-volume production. We bridge the gap between initial architecture and final qualification, playing a critical role in delivering high-quality networking solutions that power the internet. Our team is a collaborative group of technical experts who thrive on solving complex signal and power integrity challenges in a fast-paced, innovative environment. Joining this team means working on cutting-edge technology where your leadership directly impacts the reliability of global systems. We value a proactive, team-oriented mindset and a passion for engineering excellence.

Your Impact:
You will be responsible for leading hardware board design activities with a strong focus on test, qualification, and readiness for production. This role spans all phases of hardware development, from architecture and design through bring-up, validation, and qualification, combining deep technical expertise with leadership and cross-functional coordination.

Lead and mentor the hardware engineering team focused on board design, test, and qualification.
Define hardware architecture and board-level design strategy with test, qualification, SI, and PI requirements in mind.
Oversee schematic design, PCB layout, and component selection.
Review designs for quality, reliability, cost, manufacturability, testability (DFM/DFT), signal integrity (SI), and power integrity (PI).
Own test readiness, including support for bring-up, debugging, validation, and qualification.
Manage schedules, task prioritization, and resource allocation.
Work closely with FW, SW, mechanical, QA, test, and manufacturing teams.
Drive design reviews, SI/PI risk analysis, and technical decision-making.
Support transition from prototype to qualified hardware and production release.
Ensure compliance with relevant standards and qualification requirements.
Requirements:
Minimum Qualifications:
Bachelors degree in Electrical Engineering.
5+ years of experience in hardware board design and development.
3+ years of experience in a technical leadership or management role.
Proven experience with Signal Integrity (SI) and Power Integrity (PI) analysis and debug.
Experience with PCB design tools and reviewing complex, high-speed layouts.

Preferred Qualifications:
Familiarity with high-speed interfaces and SI/PI best practices.
Hands-on experience with lab equipment (oscilloscope, logic analyzer, etc.).
Strong knowledge of digital, analog, and power circuit design.
Proven experience leading or mentoring engineers.
Strong problem-solving and decision-making skills.
Clear communication and documentation skills.
Ability to manage multiple tasks and meet aggressive schedules.
Proactive, accountable, and team-oriented mindset.
Experience supporting manufacturing, test, and working with suppliers.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8546365
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Location: Caesarea
Job Type: Full Time
We are looking for a talented and experienced engineer to take part in the verification efforts for the companys core product. This position involves building and maintaining a complex verification environment, and defining and executing a test plan. In this role, you will be leading all aspects of verification and will have a critical impact on the company's R&D path.
Responsibilities
Define and implement robust SV/UVM verification solutions, including test benches and methodologies, to drive efficient verification closure across block-level and full-chip designs, integrating Mix-signals SoC simulation environment using Verilog, MATLAB, HW/SW Co-simulation and lab integration.
Work closely with Digital Design, Analog Design, Software, Back-end, SW and System teams to understand the functional, power and performance goals of the product and ensure its quality.
Requirements:
Electrical Engineering B.Sc., Computer Engineering or other relevant engineering department graduate with high scores, or equivalent experience.
5+ years in design verification, with strong SV/UVM proficiency (Less experienced engineers with high university grades or vast knowledge in RTL design will also be considered)
Self-motivated, ability to work, lead and drive tasks to completion.
Great interpersonal skills.
Understanding of digital ASIC design flows and SoC development methodologies. experience with SoC/full-chip verification, simulation/debug tools, and Unix/Linux environments, scripting languages (Python, etc.) and version control.
Advantages
Knowledge in Low Power technics and UPF standard.
Knowledge with Mix signals SoCs.
Knowledge with SW/HW Co-development.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8525656
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חברה חסויה
Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
You'll be joining the Israeli team which is the core center of our SW and ASIC design. You'll be part of the group driving our groundbreaking next-generation network devices. Our unique team works in a startup atmosphere inside a stable and leading corporate and develops the full software stack enabling the Silicon One ASICs. Join a team of dedicated engineers with a proven track-record at delivering breakthrough products. Our R&D center is outstanding - hosting all silicon HW and SW development teams inside one site. We are transforming the industry and building a new AI/ML Networks, as well as providing a unified, programmable silicon architecture that is the foundation of all our future routing products. Our devices are crafted to be universally adaptable across service providers and web-scale markets, designed for fixed and modular platforms. Our devices deliver high speed (50+ Terabits per second) without sacrificing programmability, buffering, power efficiency, scale or feature flexibility.

We are a revolutionary, ground-breaking technology for our customers and end users for decades to come! The Internet now has a new faster, better, safer engine! You have a unique opportunity to join the core center of our SW development and work with us to design and deliver breakthrough technologies

What You'll Do:

You'll be joining our Physical Design team, which is at the center of the silicon development. Our engineers deal with all chip design aspects: definition, architecture, micro-architecture, design, verification, signoff and validation.

We use the latest silicon technologies and processes to build the largest scale and most complex devices at the edge of feasibility.
Requirements:
Minimum Qualifications:

B.Sc or M.Sc Electrical Engineering or Computer Engineering graduate from leading Israeli Universities.

GPA above 87 (Please attach your grade sheet when applying to expedite the recruitment process).

You are an ambitious and motivated individual, who enjoys big challenges and can quickly ramp on multiple domains.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8546501
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Location: Tel Aviv-Yafo and Caesarea
Job Type: Full Time and Hybrid work
Join the Front-End Design team, at the core of our development. Our engineers cover the full spectrum of chip design: definition, architecture, micro-architecture, RTL design, verification, signoff, and validation.
We leverage cutting-edge silicon technologies and methodologies to develop the largest-scale and most advanced devices, pushing the boundaries of whats possible.
We are transforming the industry with a unified, programmable architecture powering our future routing portfolio and shaping the Internet for decades to come.

Your Impact:

Review micro-architecture specifications.

Implement Verification environment UVM based.

Collaborate with Design engineers to resolve bugs and achieve coverage closure.

Work with the firmware/Lab teams to verify chip flows.

Perform debug, root-cause analysis, and post-silicon validation in the lab.
Requirements:
Minimum Qualifications:

B.Sc./M.Sc. in Electrical Engineering from a top university.

3+ years of experience in the filed.

knowledge with UVM and functional verification methodologies.


Preferred Qualifications:

Experience with MATLAB simulations and bit-exact modeling environments.

Familiarity with mixed-signal systems and environments.

Knowledge and hands-on experience with Clock Domain Crossing (CDC).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Caesarea
Job Type: Full Time
Required Logic Design Engineer
Responsibilities
Design and implement complex digital circuits for ultra low-power SoC.
Participate in all phases of SoC design, from specification to coding, debug and tape-out.
Perform RTL design, synthesis, and timing analysis.
Optimize designs for power, performance, and area (PPA).
Collaborate with cross-functional teams, including architecture, System, Software, Analog, verification, and physical design engineers.
Contribute to the development of design methodologies and best practices.
Debug and resolve design issues.
Support Lab bring ups, debug and other activities.
Requirements:
Bachelor's Or Master's degree in Electrical Engineering, Computer Engineering, or a related field
Minimum 5 years of experience in logic design, working in both IP and SOC environments
Proficiency in Verilog or SystemVerilog for design
Experience with industry-standard EDA tools (Synopsys VC, Cadence etc)
Knowledge in low power design techniques
Knowledge of RTL synthesis and timing analysis flows
Strong communication and teamwork abilities
Excellent problem-solving and debugging skills
Advantage
Experience with Analog ICs, Mix-signals design, and Lab equipment
Experience with RISC-V based SoC and FW.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
What You'll Do:

You'll develop Core Software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithms, all the way down to firmware.

The team develops breakthrough next-generation silicon products.

If you're looking to work with outstanding people, developing the first iteration of world-class products, join us!

In this role, you will:

Design and develop data plan software driving the world's most sophisticated infrastructures, using a modern P4 which is a domain-specific language for network devices, specifying how data plane devices (switches, routers, filters, etc .) process packets.

Gain intimate knowledge of world-class silicon and programming models.

Work with architecture and design teams to define the next generation of ASIC products being developed.
Requirements:
Minimum Qualifications:

A recent Graduate with relevant Bachelors or Masters degree in Computer Engineering, Electrical Engineering, or a related field with GPA 85 and above.

Fluent English Proficiency.


Preferred Qualifications:

Background in Networking (L2/L3 networking technologies).

2+ years of experience in Software Development or Embedded Development.

Experience with P4 programming language.

Experience with Python programming language.

A deep understanding of network protocols.

Experience with writing and testing software for high performing and scalable networking products.

GIT, Jira, Jenkins, and CI/CD pipeline tools.

Strong troubleshooting skills to identify and resolve complex network issues, including packet capture analysis, log analysis, and protocol debugging.

Ability to quickly ramp on multiple, interdisciplinary domains.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8546296
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דיווח על תוכן לא הולם או מפלה
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שליחה
סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: Caesarea
Job Type: Full Time and Hybrid work
Join the PHY system team, a pivotal part of our development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

Key responsibilities include:

Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

What Youll Do:

Youll be part of the group driving next-generation network devices within a startup-like atmosphere inside a well-established, leading corporation.

Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin Cisco's future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.
Requirements:
Minimum Qualifications:
Education: B.Sc/M.Sc in Electrical Engineering or Computer Science from a top university.
3+ years of relevant experience required
System Orientation: Strong multi-disciplinary approach with multitasking capabilities.
Major Advantage: Specialization in Communication and Signal Processing.
Experience: Hands-on experience with lab work is advantageous.
Technical Skills: Proficiency in C++, Python, and Matlab is a plus.

Preferred Qualifications:

Varies based on the team and business needs.

Preferred Qualifications are desired education E.

Experience, and skills that are in addition to Minimum Qualifications.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8546283
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