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1 ימים
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.
Requirements:
B.Sc. in Electrical Engineering from a known university
Excellent grades
8+ years of experience in ASIC design/uarch/arch/performance
At least 4 years of hands on experience in writing Verilog/VHDL or
Strong analytic capabilities, and passion for solving logical issues
Strong debug skills
Ability to drive complex activities involving many interfaces and teams
Good communications skill
Ways to stand out from the crowd:
Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc)
Experience as an HW-architect.
Familiar with working on large high-end ASICs.
Experience in performance improvements in ASIC.
This position is open to all candidates.
 
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8333612
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26/08/2025
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our companys next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.
What you'll be doing:
Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.
Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.
Define the implementation of debug capabilities to support performance validation and improvements
Understand our system requirement and help define the POR of our switch product line.
Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.
Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.
Thoroughly understand Ethernet, InfiniBand and NvLink protocols.
Requirements:
B.Sc. in Electrical Engineering from a known university
Excellent grades
5+ years of experience in ASIC design/uarch/arch/performance
At least 4 years of hands on experience in writing Verilog/VHDL or
Strong analytic capabilities, and passion for solving logical issues
Strong debug skills
Ability to drive complex activities involving many interfaces and teams
Good communications skill
Ways to stand out from the crowd:
Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc)
Experience as an HW-architect.
Familiar with working on large high-end ASICs.
Experience in performance improvements in ASIC.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8319998
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time
our company networking unit is a world-leader fast-growing company which supports the most powerful supercomputers in the world. We make outstanding artificial intelligence happen and accelerate Open-AIs Chat-GPT, for example. We believe in our people and products and seek excellent people to join us!
We are looking for a CDC Design Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in crafting our groundbreaking and innovating chips, enjoy working in a meaningful, growing and professional environment where you make a significant impact in a technology-focused company.
What you will be doing:
You will play a major role analyzing the design and driving fixes as well as developing, maintaining, and improving our Lint, Clock Domain Crossing (CDC) and Reset Domain Crossing (RDC) constraints and methodology for our SOCs across block level, cluster level, and/or full chip level.
Responsibility for analyzing and optimizing the CDC and RDC sign-offs.
Develop and maintain key CDC/RDC checks and associated sign-offs for SOCs.
Help in driving frontend and backend assertions needed to support CDC/RDC constraints and assumptions.
Learn and understand the switch u/architecture to support the design and verification teams.
Requirements:
B.Sc. in Electrical Engineering from a known university.
Excellent grades.
5+ years of experience in ASIC design/uarch/arch/performance.
At least 4 years of hands on experience in writing Verilog/VHDL.
Strong analytic capabilities, and passion for solving logical issues.
Strong debug skills.
Experience in Python, Tcl and Make for automation and scripting tasks.
Ability to drive complex activities involving many interfaces and teams.
Good communication skills.
Ways to stand out from the crowd:
Experience in RTL Design, Synthesis and Timing and as an HW-architect.
Experience with tools like Synopsys PrimeTime, Spyglass, VC-Static, or Meridian.
Knowledge in switching fabrics with strict performance requirements. (Networking, SOC connectivity, etc).
Familiar with working on large high-end ASICs.
Experience in performance improvements in ASICExpertise in Static Timing Analysis (STA), Clock-Domain Crossing (CDC), and Reset Domain Crossing (RDC) solutions.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8327880
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1 ימים
חברה חסויה
Location: More than one
Job Type: Full Time
We are seeking a highly motivated Chip Architect to join our team and help shape the future of next-generation high-performance networking. our companys next-generation Ethernet and NVL switches are at the core of the worlds most advanced compute clusters from powering AI factories to scaling NVL-based GPU systems used in training/inferencing of the largest foundation models. As a Chip Architect at our company, you will play a central role in defining the architecture of these high-bandwidth, low-latency switches. Your work will directly impact how AI supercomputers, hyperscale data centers, and cutting-edge research platforms communicate at scale. You will join a team with a strong track record of first-in-the-world products and help deliver the next leap in networking technology.
What You'll Be Doing:
Define the end-to-end architecture and full feature set of next-generation NVL and Ethernet switch chips across all stages of the product lifecycle from early concept to deployment.
Develop architectural specifications and design guidelines, and drive trade-off analyses across multiple architecture options.
Lead research and exploration of future architectures, including innovation that contributes to patent development.
Collaborate closely with cross-functional teams including other architecture groups, logic design, firmware, system software, and research to ensure successful execution and integration.
Act as a technical leader and subject matter expert, mentoring others and driving architectural excellence across the organization.
Requirements:
BSc or MSc in Electrical Engineering, Computer Engineering, or related field
7+ years of proven experience in chip architecture, digital design, or design verification
Solid understanding of digital ASIC design and strong familiarity with the full chip development cycle
System-level thinking ability to reason across hardware/software boundaries and understand how switch architecture impacts end-to-end performance
Comfortable navigating between RTL, models, and system software to drive architectural clarity
​Ways to Stand Out from the Crowd:
Deep knowledge of networking and compute systems
Hands-on experience in system architecture across domains such as networking, CPUs, GPUs, or memory subsystems
Background in in-network computing or data-path acceleration.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8333579
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
our copmpany's Networking Clock design team is looking for experienced top notch ASIC design engineer to work on next generation of our company Networking chips. We're looking for profound and multi-disciplinary background in Clock design domains to lead Clocks Micro-Architecture activities. This role requires working with multiple teams as Architecture, IP, Physical design, Timing and Post-Si teams. Complexity of clocking scheme has grown substantially over recent chip generations with increased focus on performance, power and quality. Modern Clocking design needs to balance high frequency clocks with power, DFx, noise, circuit and physical design constraints.
What you will be doing:
Working on next generation of Networking Switch, NIC and SoC products.
Micro architect and design next generation clock topologies and modules.
ASIC Clock scheme definition.
Improve Power, Performance, and Area (PPA) of state-of-the-art company chips by evaluating trade-offs across DFx, Physical Implementation, Power Optimization and Ease of timing closure to innovate and implement new Clocking topologies in RTL.
Collaborate with Physical design and timing team to evaluate Clocking concerns and come up with solutions for supporting high speed Clocking.
Understand physical aspects of the chip and develop enhanced clock distribution techniques.
Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes, sign-off checks and all the way to Silicon bringup.
Support Post-Si debug, characterization and productization activities.
Requirements:
BSc or MSc degrees in EE or equivalent experience from known universities.
At least 5+ years of work experience in RTL design, Gate-Level and Circuit design optimization.
Deep understanding of logic optimization techniques and PPA trade-offs.
Excellent interpersonal skills and ability to collaborate with multiple teams.
Excellent problem solving and debugging skills.
Ways to stand out from the crowd:
Prior experience in RTL design (Verilog), verification and synthesis.
Clock IPs profound knowledge: PLL, DLL, Compensator.
Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects is a bonus. Prior experience in implementing on-chip clocking networks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8318114
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
חברה חסויה
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect at our company, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.
What you will be doing:
Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.
Define the HW boot, clock and Reset architecture for Switch ASIC
Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.
Requirements:
BSc or MSc in Electrical Engineering / Computer Science or equivalent experience.
4+ years of chip-design architect experience or chip design / design verification experience.
Deep understanding of how to build and integrate systems with various technology components.
Can-do attitude and high energy with leadership and excellent interpersonal skills and possess the ability to learn sophisticated concepts in a fast-paced environment.
Possess strong managerial, problem solving and critical thinking skills.
Attention to details on design and high focus on design quality.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8317796
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דיווח על תוכן לא הולם או מפלה
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סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/08/2025
Job Type: Full Time
we are seeking best-in-class ASIC Verification Engineers to help deliver the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of our company's product lines working with all our company's groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our team, you will be responsible for the verification of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, FC verification engineers, and SW teams.
What you will be doing:
Participate in micro-architecture development and document specifications.
Build System Verilog UVM verification environments for IPs in areas of crypto and Risc-V platforms.
Build verification and test plans to get to complete coverage.
Work with the designers in our team to debug and clean all bugs
Deliver the IPs to higher level verification like Cluster, FC and emulation.
Requirements:
A bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in verification of complex designs.
Proficient in System-Verilog and UVM methodology.
Good interpersonal skills. And team player.
Ways to stand out from the crowd:
Background with crypto RTL units (AES, RSA, PQC)
Experience working on Risc-V or Risc-V peripherals
Experience working in a diverse and global environment (working with engineers from China, India, and the US).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8319671
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
4 ימים
Location: More than one
Job Type: Full Time
We are seeking a highly motivated Chip Architect to join our team and help shape the future of next-generation high-performance networking. our companys next-generation Ethernet and NVL switches are at the core of the worlds most advanced compute clusters from powering AI factories to scaling NVL-based GPU systems used in training/inferencing of the largest foundation models. As a Chip Architect at our company, you will play a central role in defining the architecture of these high-bandwidth, low-latency switches. Your work will directly impact how AI supercomputers, hyperscale data centers, and cutting-edge research platforms communicate at scale. You will join a team with a strong track record of first-in-the-world products and help deliver the next leap in networking technology.
What You'll Be Doing:
Define the end-to-end architecture and full feature set of next-generation NVL and Ethernet switch chips across all stages of the product lifecycle from early concept to deployment.
Develop architectural specifications and design guidelines, and drive trade-off analyses across multiple architecture options.
Lead research and exploration of future architectures, including innovation that contributes to patent development.
Collaborate closely with cross-functional teams including other architecture groups, logic design, firmware, system software, and research to ensure successful execution and integration.
Act as a technical leader and subject matter expert, mentoring others and driving architectural excellence across the organization.
Requirements:
BSc or MSc in Electrical Engineering, Computer Engineering, or related field
7+ years of proven experience in chip architecture, digital design, or design verification
Solid understanding of digital ASIC design and strong familiarity with the full chip development cycle
System-level thinking ability to reason across hardware/software boundaries and understand how switch architecture impacts end-to-end performance
Comfortable navigating between RTL, models, and system software to drive architectural clarity
​Ways to Stand Out from the Crowd:
Deep knowledge of networking and compute systems
Hands-on experience in system architecture across domains such as networking, CPUs, GPUs, or memory subsystems
Background in in-network computing or data-path acceleration.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8327641
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
25/08/2025
Job Type: Full Time
we are seeking best-in-class ASIC Design Engineers to design and implement the worlds leading CPU's and SoC's. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. We have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in Israel, this group delivers security engines and risc-V processor IPs to all of our company's product lines working with all our company groups around the world. We are looking for inquisitive, motivated engineers with experience to continue to build this new group. As a senior member of our design team, you will be responsible for the design and implementation of high-performance, low-power security engines and risc-V processor modules. You will work closely with architects, design engineers, verification engineers, and physical design engineers to accomplish your tasks.
What you will be doing:
Participate in micro-architecture development and document specifications.
Implement in RTL and work with the verification team to ensure that the design is functional.
Apply logic design skills to optimize and meet performance and power goals.
Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.
Requirements:
A Bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in chip design development of complex designs
Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.
Good interpersonal skills. And team player.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8318055
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
27/08/2025
חברה חסויה
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are looking for an Asic Design Engineer to join the DFT design team and develop the next generation DFT technologies.
As a design engineer in the DFT design team at our company, you will participate in definition and implementation of our DFT technologies in various projects. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting Switches, Nic and SoC product lines. We are working closely with a wide range of aspects - chip design, backend, verification and production testing. We are working on the most advanced technologies and sophisticated products, our DFT solutions are unique, innovative, and we are continuously improving and evolving the solutions to meet the challenging goals.
What you'll be doing:
In this position, you will be responsible for defining, coding and integrating sophisticated DFT components into various projects and using state-of-the-art technologies.
As a member of our DFT design team, you will participate in defining various DFT features and improvements, write micro-architecture documents, code design blocks, integrate them into various projects, bring your design to silicon tape-out and silicon testing and production.
Strong collaboration with architects, other design teams, verification, back-end and production testing to accomplish your tasks.
Requirements:
B.Sc. in Electrical Engineering or Computer engineering or equivalent experience.
15+ years of practical experience.
Exposure to rtl implementation and coding.
Familiarity with verification tools.
Strong debugging, problem solving and analytical skills.
Strong communication and social skills are required.
Ability to work in a geographically diverse team environment.
Self motivated, independent and target oriented.
Ways to stand out from the crowd:
Prior Design or Verification experience.
Experience in developing sophisticated design blocks.
Integration of design elements to large cluster or full-chip.
Experience in working with back-end on area, power and timing closures.
Scripting ability.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8321620
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
26/08/2025
Location: More than one
Job Type: Full Time
we are the world leader in visual computing and artificial intelligence, powering some of the most powerful supercomputers globally. We are at the forefront of innovation, enabling breakthrough applications across various industries. From self-driving cars to the development of pioneering AI technologies like ChatGPT, we make the most impactful solutions happen.
We believe in fostering a culture of excellence and are seeking top talent to join our team. Our work environment is fast-paced, collaborative, and intellectually stimulating, offering opportunities to shape the future of technology.
The Networking Application Engineering team at our company is looking for a motivated, experienced Senior Hardware Engineer to join us in supporting groundbreaking network technologies. In this role, you will have a significant impact on both our business and the technology ecosystem, working closely with customers and R&D teams to shape the future of supercomputing and networking.
What youll be doing:
Support the development, bring up, and test of Ethernet switch hardware to ensure efficient performance and reliability.
Collaborate with partners, customers and internal RnD teams to address technical issues, provide solutions, and ensure successful integration.
Provide constructive feedback to engineering teams regarding product requirements and improvements.
Leverage network knowledge and data center experience to contribute to the development and improvement of our Ethernet switch solutions.
Requirements:
BSc/MSc degree in Electrical / Computer Engineering or related field or equivalent experience.
5+ years of HW development experience at a technology company, including high-speed multi-layer PCBs.
Excellent communication skills, both in English and in customer-facing settings.
Strong interpersonal skills with the ability to work closely with both internal teams (RnD, Product etc) and customers.
Ways to stand out from the crowd:
Proven capability to work independently and lead projects.
Proven experience in Ethernet switch hardware development, bring-up, and testing.
Strong proficiency in Python scripting for automation and testing purposes.
Background in network engineering or data center operations.
A demonstrated track record of influencing product direction and solving critical issues.
This position is open to all candidates.
 
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עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
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