דרושים » חשמל ואלקטרוניקה » VLSI Group Lead

Requirements:
BSc in Electrical engineering/Computer Engineering.
Over 7 years of experience in Logic design.
Experienced in all ASIC flow from definition to implementation.
Experience in design for power- Advantage.
Experience in High-speed I/Fs or algorithm blocks - Advantage.
Knowledge in CDC and low power flow - Advantage.

Requirements:
You hold a Bachelors degree in Electrical Engineering, Computer Engineering, or a related field, with a Masters degree being a plus.
You have 10 years of hands-on experience in design and verification of ASIC/FPGA and mixed signal systems, particularly in the realm of image sensors or closely related technologies.
You have at least 5-7 years of experience in a leadership or managerial role.
You possess a solid background in ASIC/FPGA development, including experience with HDL coding, verification methodologies such as UVM, backend and system interfaces.
You are proficient with common industry digital design tools and simulation software, such as Cadence/Synopsys, and FPGA environments Xilinx/Intel.
Your excellent leadership, communication, and project management skills empower you to thrive in a fast-paced, collaborative environment.
You are adept at managing multiple projects simultaneously, ensuring timely and high-quality deliverables.
An advantage - expertise in embedded systems and firmware development, as well as knowledge of Backend flow, manufacturing processes, and design for test (DFT) methodologies.

Requirements:
7+ years of experience as a Verification Engineer.

B.Sc./M.Sc. degree in electrical/computer engineering from a leading university.

Experience in pre-silicon functional unit level/fullchip verification.

Experience in leading block/cluster verification from scratch.

Experience in System Verilog UVM.

Experience in verification of complex SoC and designs.

Experience with AMBA protocols and NOC subsystem is an advantage.

Experience with CPU subsystem is an advantage.

Experience with PCIe is an advantage

Requirements:
B.Sc. / M.Sc. in Electrical Engineering from a leading institute
At least 10 years of experience as a VLSI Backend Engineer
In-depth knowledge of Synthesis, P&R, and STA flows
Hands-on experience of full RTL to GDS-II flow for complex designs
Experience in development in advanced nodes (7nm and below)
Experience in scripting using TCL and Python.
Advantage:
Previous managerial experience not a must.
Top-level integration experience for multi-partition SOC.
In-depth knowledge of RTL (Verilog/System Verilog)
Personality:
Self-motivated and self-directed, proactive
Ability to achieve results in a fast-moving, agile flow, and dynamic environment, both locally and across the organization
Ability to troubleshoot and analyze complex problems
Excellent communication skills, both verbally and in writing
Team player.

Requirements:
BSc in Electronics Engineering.

10+ Years of industry experience in Design.

Team Player, with excellent interpersonal skills.

Highly Motivated.

Acquaintance with all aspects of chip development.

Micro-Architecture.

Design and verification tools and methodologies.

Experience with Verilog RTL coding and Verification support.

Experience and synthesis flows an advantage.

Working with FW and SW engineers.

Requirements:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
5 years of experience with RTL development for ASIC subsystems using Verilog.
Experience with speed interfaces such as PCIe, InfiniBand, and their low latency, security, and reliability principles.
Experience with micro architecture, design, verification, logic synthesis, and timing closure.

Preferred qualifications:
Experience with scripting languages (e.g., Python or Perl).
Knowledge of arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Knowledge of high performance and low power design techniques.
Knowledge of FPGA, emulation platforms, and SoC architecture.
Knowledge of assertion-based formal verification.

Requirements:
Qualifications:

BSc in Electronics Engineering or Computer Science.

10+ Years of industry experience in verification, full chip dev. cycle.

2+ years of experience in leading a team of engineers (including technical and personal mentoring, etc.).

Experience with System Verilog and UVM methodology - MUST.

Hands-on experience with two or more of the following :

PCIE (Gen5 and above).

DDR (v4 and above).

AMBA protocol family, (inc. AXI4+, ACE/CHI)

ARM core architecture.

Advantages:

M.Sc. in Electronics Engineering or Computer Science.

Working experience with Formal verification.

Scripting skills in Python/Perl/shell.