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in this role, you will help build and evolve systems that support performance analysis, telemetry, and optimization for large-scale gpu- and cpu-based clusters used in ai and high-performance computing environments. you will work closely with hardware, networking, firmware, and software teams to collect, analyze, and interpret performance data from live systems. this is a fast-paced r&d environment where system behavior and requirements evolve rapidly, requiring adaptable engineering solutions and strong analytical thinking.
what youll be doing:
profile, benchmark, and analyze ai and hpc workloads on gpu and cpu clusters
explore performance characteristics of high-performance networking and collective communications (e.g., nccl, rdma, mpi, roce)
identify performance bottlenecks across networking, compute, memory, and system architecture
develop and enhance performance analysis, benchmarking, and diagnostic tools
define performance TEST plans and establish expectations for new technologies and platforms
collaborate across hardware, firmware, networking, systems, and software teams to provide actionable performance insights
support telemetry collection and data refinement efforts to enable accurate performance analysis
maintain high standards for  data quality, reproducibility, and traceability of performance results

in this role, you will take full ownership of a product from its definition phase, working closely with design and architecture teams. you will define and execute pre-silicon validation plans using advanced emulation platforms such as palladium and vtpsim. post-silicon, you will be responsible for planning and managing bring-up, validation and product stabilization, leading the product towards bring up and up to p-rel stage.
what youll be doing:
own the product lifecycle from definition to pre-launch.
collaborate with architecture, design and verification teams to define product validation strategies.
execute pre-silicon tests using emulation tools (palladium, vtpsim).
define post-silicon validation plans and lead execution.
write TEST program code including new infrastructures and methodologies.
drive product bring-up and stabilization toward prel and production readiness.
develop automated infrastructure to support program execution.
coordinate cross-functional activities with dft, production, and software teams.

we have assembled a team of extraordinary individuals whose mission is to push technological boundaries and define the platforms of the future. join us in driving innovation at the forefront of networking solutions.
what youll be doing:
team leadership and development: guide, mentor, and expand your engineering team, ensuring effective planning and execution of projects while maintaining high standards of quality and performance
cross-functional collaboration: work closely with product and program management, engineering and production line teams, and hr to achieve business objectives, enhance user experiences, and develop user-friendly production TEST content
product lifecycle management: oversee the complete product lifecycle, including design, development, build, and enhancement of networking systems TEST software
strategic planning and execution: define product features and roadmaps, understand Product Strategy and market positioning, and drive products to successful completion and deployment
Quality Assurance and testing: review architectural designs (electrical, mechanical, process, software) of tested units to identify potential design issues and ensure robust and efficient production, resulting in high-quality products for customers
risk management and issue resolution: identify and mitigate risks, resolve issues affecting project scope, schedule, and quality, and continuously improve processes and procedures within the team to streamline operations
this role demands a combination of strong leadership skills, technical expertise in software and hardware systems, and the ability to collaborate effectively across various departments to drive the development and delivery of cutting-edge products

as a sonic design team lead at nvidia, you will have to work closely with nvidias development and architecture teams responsible for sonic network os and gain a deep understanding of nvidia products and technologies.
what you'll be doing:
be part of nvidia sonic r&d team, contribute code to sonic worldwide community.
work in a continuous deployment environment of fast development/deployment cycles.
work with experienced teams which are well known in the sonic community.
participate in an international team of software engineers working on products for testing nvidia products.
manage, mentor, and guide a team of sonic eth switch nos.
design and implement sonic feature under Linux environment upstream to sonic open source project.
promote a culture of innovation, quality, and accountability. bring sonic nos to shine in customer's view.

come join the team and see how you can make a lasting impact on the world.
what you'll be doing:
leading and managing a dynamic team of engineers, ensuring smooth and efficient project execution.
developing and implementing ethernet sdk with a focus on high-performance and reliability.
collaborating with teams from other subject areas to identify technical requirements and successfully implement innovative solutions.
following established guidelines and standards to ensure the delivery of high-quality products.
continuously striving for excellence, improving team performance, and driving innovation.

we are looking for best-in-class senior full-chip Verification engineer to join our networking silicon team. in this role, you will be responsible for the development and verification of our next-generation nics at the system level. you will contribute to the architecture of high-speed communication devices by driving full-chip verification execution for the networking solutions powering the worlds most advanced data centers, enjoy working in a meaningful, growing environment where you make a huge impact in a technology-focused company.
what youll be doing:
full-chip verification & execution: own complex system -level features by defining verification plans and driving the end-to-end execution.
system -level debug & analysis: gain a strong understanding of chip micro-architecture and features, investigate, debug, and resolve cross-block issues to guarantee feature correctness and compliance
cross-team collaboration: work closely with multiple teams within organizations such as architecture, u-arch, firmware and all units inside the nic
ai-enhanced development: accelerate development by leveraging cutting-edge ai coding tools and frameworks.

the senior product Quality Manager will provide leadership and management for the product quality passionate about customer issues. establish, maintain, and optimize an effective quality management method and benchmark to achieve high quality performance. serve as knowledge expert of product quality, leading and mentoring in identifying fundamental causes behind issues originating from manufacturing and customer blocking issues. enhance and improve products performance by proactive risk assessment and other prevention methods.
what youll be doing:
responsible for hw product quality performance at customer install base of networking switch products.
lead structured problem solving and risk assessment for quality issues arising from production and customer
maintain and supervise product health through structured routines and meaningful metrics, enabling an effective alert mechanism for early identification
responsible for customer quality issues and working within organization to resolve
passionate about improving processes to reduce client grievances and in-house waste with a strong dedication to quality
maintain and improve product build improvements, verification and validation processes, manufacturing quality to allow high quality of networking system products throughout the entire product life cycle and improvement plan.
drive for quality process improvement initiatives to minimize customer complaints and internal scrap, drive internal quality approach

we're united in our quest to transform the way smart adapters are used.
what you'll be doing:
collaborate with skilled engineers to design and implement the doca sdk and infrastructure
take charge of end-to-end development for various features within doca
design and develop sdk libraries focusing on networking, Storage, and high-performance computing solutions
partner with major companies to address real-world challenges that demand innovative solutions and a customer-centric approach

we are looking for a formal Verification engineer for our networking team!
this is an exciting opportunity to join a hardworking pre-silicon design and verification team, working on groundbreaking nic technologies. we deploy state-of-the art formal verification tools and methodologies to prove design correctness. working in our formal verification team will expose you to a wide range of cutting edge design and technologies. our nic team delivers world class cpu interface and offload solutions for hpc, data -center, network, and Storage markets. we micro-architect, verify, and deliver the best and most widely used high bw ethernet and ib nics in the industry. nvidia has the most sophisticated formal tools and methodologies in the industry, which help us achieve a0 design tapeouts. as part of this team, you'll enjoy a versatile work environment, which is educational, dynamic and ambitious.
what you'll be doing:
in this position you will use formal verification algorithms to formally prove the correctness of complicated logic problems.
you will work on ambitious designs along with our pre-silicon team and take part in developing the next generation of core technology.
learn state of the art formal methodologies and advance your expertise in communication protocols and hardware implementations.

as a leader of our CPO switch hardware engineering team, you'll guide, encourage, and drive a team of highly skilled hardware engineers, providing them with stimulating and ambitious assignments and enabling them to stay creative and motivated while delivering products on schedule.
what you'll be doing:
build the best team to design and execute high-performance CPO (co package optics) switch system from concept to mass production.
be a key member of the technical leadership team developing world-class CPO switch designs.
this position is hands-on and will require a deep understanding of all technical/engineering aspects of the project with intimate familiarity with the entire development flow. from a technical standpoint, you will lead and support engineering teams in the following areas: specification definition, electrical schematics, opto-mechanical design, component selection, layout guidance, hands-on lab testing, production processes, qualification workflows, micro-architecture development, verification, characterization, design for testability, cost optimization, reliability, and more.
collaborate with and integrate all hw project disciplines: board design, assembly process, mechanics, thermal, pcb layout, process, production engineering, software/firmware, procurement, npi, and more.
plan and oversee your teams work on multiple simultaneous development projects in coordination with the broader leadership team. manage direct reports, set goals, provide coaching, conduct performance appraisals, plan careers, and make compensation recommendations.
collect, examine, and filter requirements from internal customers such as marketing, software, and systems engineering to assemble a comprehensive plan of record for next-generation switches while planning resource allocation for projects and assign team members effectively.
schedule projects, create realistic outcome estimates, and drive timely, successful execution for high-volume manufacturing.

as a senior software engineer in the doca verification team, you will play a key role in designing and developing the verification infrastructure for the nvidia doca sdk. this infrastructure is a complex system that executes thousands of tests every night across multiple hardware platforms and configurations. it includes mechanisms for error handling and fault recovery, while TEST results are stored, analyzed using advanced tools, and presented through live dashboards and reports. your expertise in building robust and efficient verification systems will be critical to ensuring the reliability and quality of our software.

we are in search of a top-tier ai agents solution architect to work closely with hardware architects, Verification engineers, gpu performance experts, and software developers to develop end-to-end agent flows that drive significant enhancements in simulation analysis, Kernel optimization, and Developer efficiency.
what you'll be doing:
develop innovative ai flows to improve hardware and software through collaboration with various engineering roles.
facilitate co-creation workshops to transform sme rules of thumb into specific assignments, resources, cues, and guidelines. define success measures, evaluation data, and feedback loops for agents to make a measurable difference in nvidia's hw simulation analysis and gpu- Kernel optimization workflows.
rapidly prototype and thoughtfully productize; integrate with internal services, utilize gpu capabilities, remove bottlenecks, and deliver fitting solutions.
set up evaluation backbone using offline golden sets and online telemetry for confident iterations, cost control, and safe improvements.
mentor and improve teams through insights in agent orchestration, prompting, rag, observability, crafting documentation and playbooks for teams.

own the responsibility for delivering networking features and their verification aspects.
define, develop and maintain verification infrastructure and regression tests suites - make TEST suites robust, maintainable and easy portable.
work with continuous integration system, regression tools, automate builds, run TEST suites and analyzing results.
innovate!

physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

we are seeking a networking software engineer to join our rdma transport software team, driving the development of next-generation rdma solutions for ai, cloud, hpc, and Storage. you will research and develop innovative transport algorithms that push the limits of performance and scalability. you will work in a fast-paced, collaborative environment alongside talented engineers from around the world, supporting the data needs of the worlds largest enterprises 
what you'll be doing:
take part in research, design, and development of advanced rdma transport mechanisms and algorithms, enhancing performance, reliability, and scalability.
collaborate closely with hardware engineers, software developers, and system architects to align on project objectives and requirements.
keep up with industry trends and emerging technologies, integrating new ideas and innovations into the development process