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Required Senior CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving force behind groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required CPU Design Verification Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, and system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning and test execution to collecting and closing coverage.
We're the driving team behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

Required SOC Quality and Reliability Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Our data centers are the most advanced in the world. In this role, you will help build the state-of-the-art SoCs that power these data centers by driving quality and reliability processes from the Integrated Circuit perspective. You will have an opportunity to create silicon and follow it into the field and back to drive improvements for the next-generations of chips.
You will have an understanding of Integrated Circuit (IC) flows, wafer processing, testing, qualification, yield, reliability, and failure analysis is expected. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. You will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.
The AI and Infrastructure team is redefining whats possible. We empower customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.
We're the driving force behind our groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Cloud, Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Lead the strategic definition and development of Design-for-Reliability (DfR) guidelines, collaborating with cross-functional subject matter experts to integrate reliability into early design stages.
Establish and direct the development of qualification hardware and test methodologies, managing internal teams and external vendors to ensure silicon and package verification.
Execute comprehensive silicon and package qualification programs (including high-temperature operating life (HTOL), early life failure rate (ELFR), electrostatic discharge and latch-up (ESD/LU), and biased highly accelerated stress test (b/HAST)) and conduct in-depth failure analysis to resolve quality issues.

Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.

Required Senior Verification Engineer, Digital Signal Processing, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you own the verification strategy for high-speed Physical Layer (PHY). You aren't just looking for RTL bugs, you are looking for system-level failures. You will lead the effort to verify how the digital DSP interacts with the analog front-end.
The ML, Systems, & Cloud AI (MSCA) organization designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our services (Search, YouTube, etc.) and Cloud.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities:
Lead the verification strategy for high-speed PHYs (112G/224G), defining the test plan for top-level integration and mixed-signal boundaries.
Architect and implement mixed-signal verification flows using Real Number Modeling (RNM) or SystemVerilog-AMS to verify the interaction between Analog Front Ends (AFE) and digital DSP.
Design specialized testbenches to verify the stability, convergence time, and tracking capabilities of adaptive algorithms (e.g., LMS, Zero-Forcing) across Process, Voltage, Temperature (PVT) corners.
Develop tests that simulate real-world data center conditions, including link bring-up, auto-negotiation, and error-recovery protocols.
Act as the primary verification interface for the Signal integrity and Power Integrity (SI/PI) and Analog teams, ensuring that physical channel impairments (loss, crosstalk, reflections) are accurately reflected in the Design Verification (DV) environment.

Dustphotonics , now part of Credo, develops cutting-edge technology in Silicon Photonics, revolutionizing connectivity and communication in data centers. Silicon photonics is becoming a standard technology used for high-performance systems, solving challenges of performance, integration, power, and cost. This technology is growing rapidly also in other markets such as Healthcare, LIDARs, and other sensors. At Dustphotonics, we are looking to solve difficult problems, smartly and simply, by thinking out of the box, leveraging the knowledge and know-how of the team members, and working as a team to create Magic. Our Company culture is characterized by accountability for our ethics, and for being fair to every employee, customer, supplier, and partner. We believe we must work hard and have fun on the way to success. We are seeking a motivated and organized Project Manager to support the development and delivery of Silicon Photonics products. The ideal candidate has a technical background in semiconductor manufacturing or silicon processes and is skilled at coordinating cross-functional teams to achieve project goals. This role requires strong planning, communication and execution skills with the ability to manage multiple priorities and drive progress across engineering, operations, and manufacturing teams. The successful candidate will be proactive, detail-oriented and capable of influencing stakeholders and moving projects forward without direct managerial authority. Experience in photonics, optics, hardware, or mechanical engineering environments is an advantage. The candidate should be comfortable working in a fast-paced technology organization and have a proven ability to deliver results through effective coordination, follow-up, and teamwork.

Responsibilities:

· Coordinate and manage Silicon Photonics development projects from planning through execution. · Develop and maintain project schedules, milestones, and action-item tracking. · Work closely with engineering teams including process, design, testing, packaging, and manufacturing to support project execution. · Monitor project progress and help resolve issues that may impact schedules or deliverables. · Organize and lead project meetings, document decisions, and follow up on action items. · Communicate project status, risks, and key updates to stakeholders and management. · Ensure alignment and effective communication between internal teams and external partners when required. · Drive execution and accountability across cross-functional teams without direct managerial authority. · Support multiple projects simultaneously while maintaining attention to detail and meeting deadlines. · Help establish project plans and ensure activities are completed according to schedule.

abra R&D is seeking for a Verification Engineer. We are looking for an Adaptable Verification Engineer who can move across blocks and tasks, partner with design/FPGA/architecture, and own floating assignments with partial specs. ?Key Responsibilities:
* Build/maintain SystemVerilog/UVM environments; write testbenches, simulations, and regressions.
* Analyze specs- create verification plans; drive debug and bug fixing to closure.
* Track functional/code coverage; document flows and improve team productivity.
* Context?switch across blocks; support integration and ad?hoc scripting/automation.

we are looking for a Senior ML Engineer.
Responsibilities:
As a Senior Machine Learning engineer at Substrata, you will be working directly with our Head of R&D and will take a major role building our Pragmatic Intelligence Engine using and experimenting with S.O.T.A Deep Learning architectures, including: Multi-Layer Perceptron Neural Network, LSTM, mLSTM, CNN, RNN, VDCNN, etc.

We are looking for a Senior Algorithm Developer with experience in NLP and LLMs, who is highly motivated, collaborative, and results-driven individual who can work both independently and as part of a multidisciplinary team. The ideal candidate has a strong can-do attitude, excellent problem-solving skills, and a passion for leveraging AI to solve meaningful challenges in text analysis in the medical domain.

As part of the AI team you will:

Design, develop, implement, and evaluate robust, scalable AI algorithms and agentic workflows tailored to real-world challenges in clinical settings.

Prepare, process, and analyze complex medical data to support algorithm development and validation.

Ensure the reliability, performance, and accuracy of algorithms in production, including troubleshooting, testing, monitoring, and continuous improvement.

Collaborate closely with Product Managers and Clinical Specialists to translate clinical and business needs into data-driven solutions.

Research, develop and integrate cutting-edge text based alogirthms on medical text.

Apply NLP and Large Language Models (LLMs) to extract insights from medical texts and develop intelligent agents for optimized clinical decision support.

Stay up to date with cutting-edge advancements in GenAI, LLMs, and Deep Learning.

Organize and actively participate in seminars, book clubs, and conferences.

Main Technical Stack:

NLP/LLMs: Pydantic, Hugging Face Transformers, spaCy, Amazon Bedrock

Infrastructure: AWS, Docker

Programming Languages: Python

Deep Learning Frameworks: TensorFlow, Keras, Pytorch

Required Cloud FinOps Business Partner
Israel - Raanana
We dont limit our challenges. We challenge our limits. Always. Were ambitious. Were game changers. And we play to win. We set the highest standards and execute beyond them. And if youre like us, we can offer you the ultimate career opportunity that will light a fire within you.
So, whats the role all about?
We operate at high cloud scale in a challenging environment, where best-practice FinOps turns that scale into measurable savings and business value. As a Cloud FinOps Business Partner, you'll sit at the center of how we invest in, optimizes, and governs a large-scale cloud footprint. Working across Engineering, Operations, Finance, Procurement and IT, you'll drive cost visibility, lead optimization programs, and shape best-practice FinOps at scale - boosting the company's cloud efficiency and cloud governance.
How will you make an impact?
Support business units with cloud cost transparency by preparing reports, dashboards, and cost breakdowns.
Partner with Engineering, Cloud Ops, Finance and Product teams to turn cost insights into action
Assist in company-wide cloud efficiency and cost-optimization programs by analyzing usage data and identifying savings opportunities.
Track and maintain FinOps KPIs and reporting; build and maintain optimization roadmaps aligned with organizational goals.
Monitor commitment coverage (Reserved Instances, Savings Plans) and flag commercial opportunities for review.
Analyze AWS cost and usage reports and assist with budget tracking and variance analysis.
Collaborate with internal stakeholders and help contextualize cloud billing data for non-technical audiences.
Participate in FinOps initiatives around AI workloads and assist in tracking AI-related cloud costs.