לוח משרות דרושים ASIC / VLSI, לחיפוש זה נמצאו 37 משרות

As a Senior RTL Verification Engineer, you will lead the verification of complex subsystems and architectural features within a next-generation, high-performance RISC‑V Application Processor. You will work closely with architecture, design, modeling, software, validation, and implementation teams to ensure first-pass silicon success while meeting aggressive performance, power, and area (PPA) targets.

In this role, you will drive verification strategy, methodology, and execution from specification through tape-out, providing technical leadership in the definition of scalable verification environments, coverage closure plans, and debug methodologies. You will be expected to independently own large verification domains, influence design and architecture decisions, and mentor junior engineers.

The ideal candidate has extensive experience in CPU or SoC verification, with strong expertise in one or more of the following areas: RISC‑V architecture, CPU microarchitecture, MMU, memory hierarchy, cache coherence, interconnects, and micro-controller verification.

Responsibilities

Lead verification efforts for complex CPU and SoC subsystems from architecture definition through tape-out.

Define comprehensive verification strategies, test plans, coverage models, and closure criteria.

Architect, develop, and maintain advanced UVM-based verification environments and reusable verification components.

Drive verification execution, including stimulus development, functional coverage closure, assertions, regressions, and debug.

Collaborate closely with architecture and design teams to review specifications, identify ambiguities, and ensure verifiability.

Develop constrained-random, directed, and scenario-based tests to validate functional correctness and corner cases.

Drive root-cause analysis and resolution of complex design and verification issues.

Define and implement verification methodologies that improve scalability, quality, and productivity across the project.

Work with software, modeling, performance, and validation teams to develop system-level verification solutions.

Analyze verification metrics and risks, proactively driving closure plans to achieve project milestones.

Mentor junior verification engineers and contribute to the technical growth of the team.

Contribute to DV methodology discussions and influence verification best practices across the organization.

Be part of a team responsible for designing the next generation of mobile devices. The position includes responsibility for system analysis and HW architecture design for high-speed and low-power interfaces, networking protocols, storage processing, including acceleration of protocols reducing overall power consumption. The job requires collaboration with multiple engineering functions and teams in various geographical locations. It includes identifying system use, requirements definitions, understanding of industry specification for interfaces, operating in industry Standards committees, SW and HW interaction, performance analysis, and more.

we are looking for a hands‑on Design Verification Lead to drive verification of next‑generation wired/wireless peripheral subsystems that power Snapdragon platforms.

As a DV Lead in the Peripheral group, you will own verification of complex IPs and subsystems, define and execute UVM‑based verification strategy, and lead a small team of talented engineers to first‑time‑right silicon.

This is a 5 days on site position in Haifa
What youll do

Define verification strategy, test plan, and coverage goals for complex peripheral IP and subsystem blocks

Architect, develop, and maintain UVM‑based constrained‑random verification environments

Lead day‑to‑day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance

Drive debug of complex issues across RTL, testbench, and system level, working closely with design, emulation and validation teams

Analyze and close functional and code coverage, drive quality metrics to tape‑out criteria

Contribute to methodology and flow improvements across the Peripheral DV team

We are looking for a RF System Engineer to join a new product development team working on advanced RF wireless systems.

This role focuses on RF system requirements definition, system simulations, hands‑on lab integration, and end‑to‑end system bring‑up, including systems based on large‑scale analog and digital phased‑array antennas.

Key Responsibilities

Contribute to defining RF and mmWave system architectures, including transceiver lineups and link budget analysis

Support RFIC integration, design validation, and performance optimization

Perform hands‑on RF measurements and system characterization. Analyze captured IQ data and define transmit signal vectors

Debug and resolve complex system‑level performance and integration issues

Collaborate cross‑functionally with system, RFIC, DSP, and software teams to enable features and optimize performance

We are looking for highly motivated engineers who love the challenges and the opportunity of a small company. Join us and be a part of a small and dynamic team, which revolutionizes the parallel processor architecture.

As a Principal Quality and Reliability Engineer, you will play a crucial role in ensuring Annapurna Labs' semiconductor products meet customer demands. Your responsibilities will include leading all Q&R activities for one of our IC product lines, chart the technical direction, build and lead a team of Q&R engineers, direct work with Annapurna's customers to jointly debug failures and reduce IC related failures, and support RMA analysis.
In this role you will have significant impact on, and be completely exposed to, the semiconductor production flow of all Annapurna Labs products, semiconductor testing methodologies and FAB process yield improvement activities.
This is a fast-paced role where you'll work with thought-leaders in multiple technology areas. You'll have high standards for yourself and everyone you work with, and you'll be constantly looking for ways to improve our products' overall performance, quality, and cost.