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25/12/2025
Location: Herzliya
Job Type: Full Time
Our Chip Design team is growing! Join our high-end product design team and help shape the next generation of advanced semiconductor solutions. About us our company  has been delivering tens of millions of chips annually to leading tier-1 customers in the Security, Cloud, and Computing domains. We specialize in semi-custom, high-quality solutions, going above and beyond to meet our customers needs. Our Israel Design Center is fully self-contained, covering everything from product definition and architecture to design, software, validation, and TEST - meaning real ownership and no daily late-night calls across time zones We also pride ourselves on a warm, open culture where everyone knows each other, and every engineer can clearly see the impact of their work on the final silicon. We are looking for experienced Chip Design Engineers to join our team and take a key role in RTL design, new IP development, and SOC integration As part of the design team, you will be deeply involved in architectural exploration, protocol evaluation, and hands-on design work across multiple chip blocks. Responsibilities
* RTL design and implementation of new IPs
*  SOC integration and design ownership of chip subsystems
* Exploration and evaluation of new protocols and architectural solutions
* Close collaboration with architecture, verification, validation, software, and back-end teams
* Delivering high-quality, best-in-class RTL that meets performance, power, and area goals Why Join Us?
* Work on cutting-edge, high-volume silicon products
* Real impact on end-to-end chip development
* Collaborative environment with strong technical ownership
* A stable yet agile organization with a human, people-first culture
Requirements:
BSc or MSc degree in electrical / computer engineering from leading institutions 3-7 years of hands-on experience in VLSI / chip design Familiarity with the RTL-to-GDSII full flow - advantage Strong analytical thinking, communication skills, and ability to work in a multi-disciplinary team
This position is open to all candidates.
 
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23/12/2025
Location: Caesarea
Job Type: Full Time
We are looking for a hands-on, experienced Physical Design Engineer to join us and help define and implement next-generation AI SoC in an advanced technology node

You will play a key role in building and leading our physical design team, developing flows and methodologies, and driving the full RTL-to-GDSII implementation and signoff for one of the most advanced SoCs in the industry.

What Youll Do

Take part in shaping methodology and best practices in advanced technologies

Drive end-to-end implementation: synthesis, P&R, timing closure, and signoff

Collaborate closely with architecture and design teams on timing, floorplaning, partitioning, and power specification

Define and optimize static timing constraints, area, and power goals at block and top levels

Take part in flow development and automation to improve efficiency and quality of results
Requirements:
At least 3+ years experience with RTL2GDS flow

BSC/MSC in Electrical/Computer engineering

Deep understanding on STA principals, synthesis, and P&R flow

Solid experience in physical verification and advanced process nodes
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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23/12/2025
Location: Caesarea
Job Type: Full Time
Our group is responsible for the development of next generation SoC for AI Networking Compute . The development starts from product definition through architecture, design, verification and up to implementation.

The complex SoC is a high-performance device running AI scale-out for inference workloads computer for vision and audio processing, with technologies from multi-disciplines.
Requirements:
7+ years of experience as a VLSI design engineer
B.Sc./M.Sc. degree in electrical/computer engineering from a leading university
Experience in defining uarch and design of complex design units.
SoC design experience.
full cluster/block uarch, design, inital synth, lint, integrating and supporting PD, DFT and verification.
Experience in HW implementation of packet processing / Ethernet / Infiniband / RDMA Experience in high-speed interfaces DDR/PCIe
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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23/12/2025
Location: Caesarea
Job Type: Full Time
We are looking for a Senior Verification Engineer to be a significant part in developing a complex and innovative SoC chip in a start-up company.

Taking full ownership of entire domain, defining the verification strategy, writing, and executing verification plan in system Verilog UVM.
Requirements:
5+ years of experience as a Verification Engineer.
B.Sc./M.Sc. in Electrical/Computer Engineering from a leading university.
Strong knowledge of System Verilog and UVM methodology.
Experience in pre-silicon functional unit level/cluster/full chip verification.
Experience in verification of packet processing/Ethernet/RDMA/InfiniBand
Familiarity with SoC architecture, CPU subsystems, and multi-core designs.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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22/12/2025
Location: Tel Aviv-Yafo and Yokne`am
Job Type: Full Time
we are seeking a motivated and detail-oriented Software Engineer to join our innovative VLSI Design Automation team. This group is responsible for building advanced VLSI CAD solutions and web-based platforms. We are looking for a full-stack engineer who is excited about handling large-scale data, enhancing web performance, and developing intuitive dashboards and applications. The ideal candidate brings solid backend experience, a strong data-driven mindset, a passion for learning, and excellent collaboration skills.
What youll be doing:
Design, develop, test, integrate CI/CD pipelines, deploy, and support features for web applications and dashboards.
Own the services and databases you build.
Identify areas for improving performance and inserting automation.
Requirements:
Bachelors degree in Computer Science or equivalent practical experience.
3+ years of hands-on full-stack development experience.
Strong proficiency in Python.
Experience working with database systems, including SQL (such as PostgreSQL or MySQL) and NoSQL solutions.
Hands-on experience with FastAPI.
Familiarity with CI/CD methodologies and related tools.
Experience building data visualizations in Python.
Strong working knowledge of Linux environments.
Ways to stand out from the crowd:
Background with Kubernetes and Docker.
Experience working with Kafka and event-driven architectures.
Experience with React, experience with logging and monitoring systems.
Background with data analysis libraries such as pandas and NumPy.
Previous exposure to machine learning concepts and frameworks.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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21/12/2025
Location: Yokne`am
Job Type: Full Time
Do you want to take part in accelerating the networking solution across our company's product portfolio? our company Co-packaged silicon-photonics group is seeking a dedicated R&D engineer to join our lasers and silicon-photonics validation team. We are seeking a skilled and experienced lasers and electro-optics engineer or physicist to join our team. The ideal candidate will have deep understanding of optics, lasers, and fiber-optic technology, together with expertise in laser testing, characterization, and packaging.
In this role you will participate in laser development for different networking products, including test setup design and test automation, perform tests and characterization of packaged lasers and of optical modules in a system. You will collaborate with cross-functional teams (R&D, verification, architects, FW, electronics, mechanics) internally and externally. This role requires hands-on experience and a deep understanding of optics and laser physics, high-speed testing, excellent Integration, problem-solving skills, and strong communication abilities.
What youll be doing:
Develop, implement and automate testing methodologies and procedures for laser characterization and performance evaluation , including power, wavelength, modulation, and noise measurements.
Document experimental results accurately and clearly present findings.
You will lead the design of verification setups for bringing up and testing the new SiPh transceiver chips.
Develop and implement laser testing methodologies and procedures to perform laser testing and characterization, including modulation and noise measurements.
Provide technical support and assistance to manufacturers of silicon photonics testing platforms.
Troubleshoot and diagnose technical issues related to equipment, processes, and software.
Document experimental procedures, results, and findings accurately and comprehensively.
Collaborate with cross-functional teams, including engineering, product development, and manufacturing, to resolve complex technical issues and implement system upgrades or modifications.
Requirements:
BSc. Degree (MSc. or PhD an advantage) in Electrical Engineering or Physics or related fields, with more than 5 years of experience.
5+ years of relevant experience in both laser testing and in high-speed electro-optical testing.
Proven experience working in an optics and laser laboratory, preferably in a research or development environment.
Strong problem-solving, debugging, and analysis with examples to prove it.
Experience with establishing complex optical lab setups. Proficient in using various electro-optical & electrical measurement tools.
Strong collaborative and interpersonal skills, with an ability to successfully guide and influence.
Ability to manage multiple tasks and priorities simultaneously, and work independently and demonstrate a high level of initiative and self-motivation.
Ways to stand out from the crowd:
Strong knowledge of laser diode physics, fiber optic technology, and silicon photonics technology and devices.
Experience with high-speed signal measurement of electro-optical devices.
Knowledge of programming languages, such as MATLAB, Python, or LabVIEW, for data analysis and automation.
Post-silicon validation and/or customer on-site debug/FA.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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17/12/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
Lead verification for advanced ASIC/FPGA designs in a top-tier R&D team developing high-performance network interface solutions and customer-focused hardware.
Location: Tel Aviv office or our Beer Sheva office, which is located next to the train station
Responsibilities:
Drive verification of complex, high-speed ASIC/FPGA designs
Define and implement advanced verification methodologies
Collaborate with architecture, software, and validation teams
Mentor engineers and promote technical excellence
Work with technologies like high-speed interfaces, network processors, and SoCs.
Requirements:
B.Sc. in Computer Science or Electrical Engineering
7+ years of hands-on verification experience
Proven end-to-end ASIC flow experience (design to tapeout)
Strong teamwork and communication skills
Advantage:
Leadership or technical management experience
Ability to guide teams toward successful delivery
Bonus Skills:
Python/Bash scripting
SoC integration
Formal verification
Palladium, GLS.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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17/12/2025
Location: Be'er Sheva
Job Type: Full Time
Were hiring an experienced verification engineer to join our team developing advanced telecommunications ASIC/FPGA products. You will join our companys family, as part of our team in Beer-Sheva.
Responsibilities:
Build and maintain verification environments (SystemVerilog/UVM or Specman)
Develop test plans and run constrained-random & directed tests
Debug, analyze coverage, and work closely with design teams
Contribute to methodology and process improvements.
Requirements:
BSc/MSc in EE/CE or related field
5+ years of ASIC/FPGA verification experience
Strong in SV/UVM or Specman
Scripting (Python/Bash), Linux
Great debugging and teamwork skills
Advantage:
Telecom protocols knowledge
ASIC/FPGA design background
Experience in FPGA prototyping or hardware validation.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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14/12/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We operate in true startup mode: fast-paced, ambitious, and deeply technical. The project is challenging across architecture, RTL, verification, and schedule and we are looking for a Senior Design Engineer who wants to push boundaries, work hard, and help build something that has never been done before.

The Senior Design Engineer will join a team responsible for the architecture, design, and verification of a high-performance controller ASIC at the core of this new computational paradigm.

Your Day to Day
Own the design, micro-architecture, and implementation of digital logic for a high-performance ASIC
Translate system-level requirements into detailed micro-architecture and RTL designs
Develop high-quality RTL code in Verilog/SystemVerilog
Work closely with the algorithm, verification, analog, and software teams to define interfaces and ensure end-to-end functionality
Participate in design reviews, propose improvements, and ensure compliance with coding and design guidelines
Integrate and debug digital modules in simulation and lab environments
Support synthesis, timing closure, performance optimization, and power reduction activities
Collaborate with verification teams to define test plans and ensure thorough coverage
Contribute to a high-intensity startup environment where solving tough technical challenges and meeting ambitious schedules is part of the mission
Requirements:
Required:
At least 5 years of experience in digital design for ASIC.
BSc/MSc in Electrical Engineering, Computer Engineering, or related field
Strong RTL development experience in Verilog/SystemVerilog.
Solid understanding of computer architecture, logic design, and digital system fundamentals.
Experience with micro-architecture specification and documentation.
Strong communication skills and the ability to work cross-functionally.
Self-driven, detail-oriented, capable of owning complex design challenges
Fluent in English, both verbal and written.

Advantages:
Experience with high-speed SERDES or parallel interfaces (PCIe, Aurora, Ethernet PHYs, custom links, etc.).
Background in high-speed ASIC design, timing closure at high frequencies, and complex synchronization schemes across clock domains.
Familiarity with verification methodologies (UVM), simulation flows, and coverage-driven verification.
Experience with scripting languages (Python, Perl, Tcl).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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14/12/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for talented engineers to help us develop a semiconductor platform based on revolutionary architecture.
Take part in the development of cutting-edge products within a disruptive system architecture. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, and fast-paced environment. our Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud, which powers hundreds of thousands of businesses in 190 countries around the world.
We are looking for talented physical design implementation engineers to join our excellent Physical Design team, which develops our next generation of products for the cloud market.
Key job responsibilities
* Daily involvement in all aspects of physical design chip development (RTL2GDS), including floorplanning, synthesis, clock tree synthesis, place and route, static timing analysis, power and noise analysis, physical verification testing, and equivalence checks.
* Being actively engaged in design-backend convergence aspects and defining timing constraints.
* Taking full end-to-end responsibility for the physical design of macros and clusters level, according to specifications, under challenging constraints, with focus on optimizing power, area, and performance.
* Participation in the development of design flows, using a variety of EDA tools and vendors such as Synopsis and Cadence.
* Engaged in defining implementation and signoff methodologies.
A day in the life
Your day will be filled with dynamic technical challenges that push the boundaries of semiconductor design. You'll collaborate with cross-functional teams, diving deep into intricate physical design processes, and translating complex architectural concepts into tangible technological solutions. Expect to engage in cutting-edge problem-solving that requires both creative thinking and precise technical execution.
Requirements:
Basic Qualifications
- Understanding the entire physical design flow (RTL to GDS)
- Deep understanding of sign-off activities (timing and physical verification)
- Experience in advanced nodes technologies and Implementation tools
- Process and technology oriented
- Leadership and mentoring skills
Preferred Qualifications
- Full-chip experience (floor plan, layout, timing)
- Previous experience in high-speed designs, multi-voltage (low power) designs.
This position is open to all candidates.
 
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