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What You'll Do:
You'll develop Core Software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithm.
The team is leading the silicon development in our company. We use the latest silicon technologies to build the largest scale and most complex devices at the edge of feasibility.

If you want to work with amazing people, developing the first iteration of world-class products, join us!

Join the PHY System team, part of our core silicon development group.
Our team is responsible for PHY and system-level aspects of some of the most advanced networking devices in the industry, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

We work with the latest silicon technologies and processes to build large-scale, highly complex devices at the edge of feasibility. Youll be part of a unique design center that hosts all silicon HW and SW disciplines under one roof, operating in a startup-like environment within a stable, world-leading company.

We are transforming the industry with a unified, programmable silicon architecture that powers our future routing portfolio and helps shape the Internet for decades to come.

Your Impact:

Develop PHY firmware and system-level features for advanced networking ASICs.

Design and implement PHY calibrations and system definitions.

Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis.

Collaborate closely with PHY, system, firmware, and silicon design teams.

Contribute to defining system operation modes and end-to-end device behavior.

Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies.

What You'll Do:

You'll develop Core Software technologies at the heart of tomorrow's leading infrastructure solutions, tackling the entire range of challenges from user-facing API-s, through high-level algorithms, all the way down to firmware.

The team develops breakthrough next-generation silicon products.

If you're looking to work with outstanding people, developing the first iteration of world-class products, join us!

In this role, you will:

Design and develop data plan software driving the world's most sophisticated infrastructures, using a modern P4 which is a domain-specific language for network devices, specifying how data plane devices (switches, routers, filters, etc .) process packets.

Gain intimate knowledge of world-class silicon and programming models.

Work with architecture and design teams to define the next generation of ASIC products being developed.

Join the PHY system team, a pivotal part of our development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

Key responsibilities include:

Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

What Youll Do:

Youll be part of the group driving next-generation network devices within a startup-like atmosphere inside a well-established, leading corporation.

Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin Cisco's future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

Join the PHY system team, a pivotal part of our development. Our team focuses on the PHY and system aspects of our devices, including PHY firmware, calibrations, system definitions, operations, and post-silicon validation.

Key responsibilities include:

Working with the latest silicon technologies and processes to build large-scale, complex devices at the forefront of feasibility.
Contributing to the development of PHY firmware and system calibrations.
Participating in system definitions, operations, and post-silicon validation activities.

What Youll Do:

Youll be part of the group driving next-generation network devices within a startup-like atmosphere inside a well-established, leading corporation.

Our unique design center integrates all silicon hardware and software development disciplines under one roof. We are revolutionizing the industry by building a new internet for the 5G era, with a unified, programmable silicon architecture that will underpin our future routing products. Our devices are designed for adaptability across service providers and web-scale markets, delivering high speed without compromising programmability, buffering, power efficiency, scale, or feature flexibility.

We are seeking an experienced and highly motivated C++ Software Engineer to join the Compiler team of our Network Technology R&D organization, contributing directly to the evolution of next-generation networking products.

You will work on pioneering technology that powers the future of the Internet.

You will be part of a global team working on the newest generation of us, which will be integrated across the entire portfolio of our devices.

You will collaborate with worldwide distributed R&D centers, gaining exposure to some of the most talented engineers in the networking industry. We look for people who love technology and engineering-people who thrive on innovation, continuous learning, and challenging whats possible.

Your Impact:
Design, implement, and test a state-of-the-art optimizing compiler for us.
Evaluate and optimize code performance, including debugging, code generation improvements, and pipeline analysis.
Develop, optimize, and enhance the compiler backend to fully leverage cutting-edge hardware capabilities.
Solve complex resource management challenges across hardware pipelines.
Design and implement new P4 language features that empower network application developers.
Build and maintain the compiler toolchain for custom networking applications.
Contribute to libraries, analysis tools, and supporting infrastructure.
Collaborate with cross-functional hardware and software teams.
Work closely with ASIC engineers on next-generation IC design, influencing hardware through compiler insights prior to tape-out.

We are seeking a talented Technical Program manager to join our software group. In this high-visibility, hands-on role, you will drive forward the development of our software platform by defining the product and technical direction.

Responsibilities:
Collaborate with other team leaders to establish the product and technical vision for the software group.
Lead the planning, development and implementation process of cross-functional teams focused on delivering cutting-edge technology and products.
Oversee project monitoring, reporting, and risk management, from initiation to delivery, addressing intergroup dependencies to ensure timely and successful completion.
Lead process and methodology improvements, proactively addressing issues to achieve business goals.
Help define our next-generation product roadmap and New Product Introduction (NPI) process.

We are looking for a highly experienced product manager expert to join our Product and Architecture team. The Product & Architecture team is responsible for defining, directing, and driving the product strategy for the entire software stack. If you are a Strategic thinker who can translate market needs into actionable product plans while balancing technical feasibility, an excellent communicator, an Influencer and a negotiator-capable of rallying disparate teams around a common vision and resolving conflicts in a fast‑moving startup environment where priorities shift rapidly, you belong with us.

In this high-visibility and influential role, you will take part in building the process of turning customer requests into shippable action items, working with customers and leaders, scientists and researchers and of course developers and engineers in complex, highly technical domains.

Responsibilities:
Strategic product ownership - research market/HPC needs, set roadmap, and define positioning for the accelerator stack.
Feature prioritization & backlog grooming - write clear user stories, enforce acceptance criteria, and balance short‑term delivery with long‑term performance goals.
Cross‑functional leadership - assist managers in leading sprint planning, reviews and retrospectives; coordinate software, firmware, hardware, and customer‑success teams.
Customer advocacy & feedback loop - capture interview insights, translate pain points into technical requirements, and track feature‑adoption metrics.
Performance KPI management - assist leadership in defining throughput/latency/energy targets, oversee benchmark suites (FFT, BLAS, MPI), and report quarterly results against industry leaders.
Continuous product quality improvement - monitor defect rates, regression test coverage and performance regressions; drive actions that reduce technical debt and increase customer confidence.

We are seeking an exceptional Software Team Lead to guide the development of our runtime software stack. This role requires a rare combination of deep technical expertise, hands-on coding ability, and proven leadership experience. You will own the architecture, implementation, and system-level integration of drivers, runtime components, and low-level system software, driving technical excellence and performance across the stack. The ideal candidate thrives under pressure, takes full ownership of outcomes, and sets the bar for quality and innovation in the team.

Responsibilities:
Lead and mentor a team of runtime and embedded software engineers, setting the standard for technical excellence.
Define and drive the architecture, roadmap, and performance expectations for the runtime stack, ensuring scalable, robust, and high-performance solutions.
Oversee cross-team software projects from concept through production, while remaining hands-on in coding, debugging, and system bring-up for critical components.
Establish rigorous standards for testing, CI/CD, and software lifecycle processes, ensuring maintainable and reliable delivery.
Conduct architecture and performance reviews, providing decisive guidance in ambiguous or high-pressure situations.
Collaborate deeply with architecture, compiler, hardware, and platform teams to deliver cohesive, system-level solutions.
Provide technical leadership to resolve conflicts, make tough trade-offs, and uphold engineering excellence.
Recruit, mentor, and retain top-tier engineering talent.

We are looking for an experienced software engineer with a performance oriented view of coding and knowledge in parallel frameworks. Someone who likes to have an end-to-end understanding of HW-SW, and make an impact on the world of accelerated computing to join our SDK group.

Responsibilities:
Play a key role in defining the architecture for the parallel compute framework API, and how it will interact with other common parallel compute frameworks. Integrate parallel frameworks using our SDK.
Ownership and accountability for accelerated solutions of common math libraries using NextSilicon SDK. Owns features end-to-end from requirements to testing.
Play a key role in defining and implementing NextSilicon SDKs and APIs.
Implement accelerated solutions and innovate by understanding our full software stack end-to-end. Identify performance bottlenecks and resolve them.
Work in close collaboration with cross-functional and multidisciplinary teams, including software, hardware, system, research, and apps engineering teams.

We are looking for a talented Code Generation and Optimization Expert. We are looking for a self- , independent engineer to join the team that builds the software infrastructure for accelerating the system in large scale compute environments like data centers and HPC using new CPU core technology. Working on the cutting edge and future ready systems. We work in a development culture that is diverse, flexible and challenging. For persons looking to make an impact and influence the future of computing with personal growth options.

The CodeGen team is developing core components in the automated optimization process that adapts our unique hardware architecture to run any HPC & AI applications, with little to no code modifications required. By using iterative rounds of telemetry and optimization, our compiler is able to intelligently adapt our accelerator into a workload-specific ASIC, at runtime.

We are seeking a talented Code Generation and Optimization Expert to join our bleeding-edge CodeGen team in Israel. In this high-visibility, hands-on role, you will play a pivotal part in building NextSilicons next-generation runtime compiler.

Responsibilities:
Design and maintain the distributed and heterogeneous executable that is generated by our compiler stack.
Using the MLIR framework, transform high level compiler outputs into hardware-specific binary images, memory mappings, execution parameters, resource allocation, region grouping, and cross-domain coordination for distributed systems.
Design and maintain the API layer (libRT.a) connecting compiler-generated code with runtime services, ensuring seamless integration across different execution domains.
Collaborate closely with hardware, architecture, verification and other compiler teams to align software with hardware requirements and behavior.

We are seeking an experienced and highly skilled Software Engineer to join our Runtime Software group. In this role, you will drive the development of the full software stack and architecture behind our revolutionary coprocessor. You will be challenged to deliver high-performance, system-wide solutions, requiring a deep understanding of complex architectural trade-offs and distributed systems.

As a core team member, you will design and implement infrastructure that enables our unique hardware to accelerate diverse applications at scale. You will collaborate across disciplines - working with hardware engineers, compiler developers, and system architects - to optimize execution in a massive, multi-process, and multi-threaded environment.

Responsibilities:
Design and implement next-generation runtime architectures and infrastructures to support evolving product requirements.
Develop environments for the acceleration of massively parallel applications, managing complex process and thread lifecycles.
Define development scopes and roadmaps to ensure the successful delivery of robust software features.
Partner with hardware and compiler teams to bridge the gap between silicon capabilities and software performance.

We are seeking an exceptional Director of AI Software to lead the full AI software stack that powers our next-generation accelerator platform. This executive-level role owns the strategy, architecture, and execution of all AI software components- including frameworks, compilers, runtime, kernels, developer tools, and end-to-end AI workloads.

You will lead multiple teams responsible for running state-of-the-art models (LLaMA, DeepSeek, diffusion, MoE and future generations of AI), building high-performance kernels, integrating industry frameworks, and delivering a developer-friendly stack to customers, which showcases and materializes the full potential of our hardware.

Responsibilities:
Own the vision, roadmap, and execution of the full AI software stack (frameworks, compilers, runtime, kernels, tools).
Lead teams responsible for running and optimizing AI workloads
Deliver first-class support for PyTorch, Triton, IREE, CUDA-compatible flows, and emerging AI frameworks.
Oversee development of high-performance kernels (GEMM, attention, memory ops) and compiler optimizations.
Drive HW/SW co-design with silicon, architecture, and runtime teams to maximize performance and efficiency.
Ensure end-to-end product delivery, including SDKs, toolchains, developer experience, and documentation.
Own benchmarking, performance targets, and competitive analysis
Build, mentor, and scale a multi-disciplinary AI software organization.
Support bring-up, validation, and tuning of new hardware accelerator generations (pre-silicon and post-silicon).

The AI software team is building solutions that enable the latest AI models and workflows to run efficiently on our unique hardware architecture-unlocking a new level of performance

We are seeking a talented engineer to work on our AI software stack and specifically the AI graph compiler which optimizes AI models to run on our hardware architecture.

Responsibilities:
Develop our AI graph compiler and related components in the SW stack.
Drive the performance of AI models running on our unique architecture.

We are looking for an experienced STA Lead Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.
Responsibilities:
Take part in STA activities for blocks, Sub Systems and Full chip, from definitions to TO.
Analyze timing results, verify correctness and provide timing budget for the different partitions.
Own the timing constraints both for STA and P&R flow.
Working closely with architecture, design, PD and DFT teams to make sure timing closure and ensures product success.
Identify risks and bottlenecks, work closely with PD, RTL and DFT teams, ensuring convergence throughout various project stages.
Participating in design methodology, reviews and tool automation work and definition.
As part of this rule you will gain very good understanding of our HPC and AI designs and sub system as well as product targets.