we are looking for a IC Package Design Engineer.
In this role, you will contribute to the development of complex ASIC package designs from early planning and exploration through implementation and tapeout. You will collaborate across package design, layout, SI/PI, and silicon teams to help deliver high‑speed, robust, and manufacturable package solutions.
You will participate in package architecture activities, design tradeoff discussions, and technical problem solving while growing your expertise in advanced packaging technologies and system-level integration. This role provides an opportunity to work on some of the most advanced networking silicon products in the industry within a highly collaborative engineering environment.
Responsibilities:
As a member of the Package Design team, you will:
Lead the package design activities including planning, floorplanning, pinout optimization, stack‑up definition, and high‑speed routing suport.
Collaborate with SI/PI, silicon floorplanning, layout, and manufacturing teams to ensure high‑quality package solutions.
Support package implementation activities and work closely with layout designers to ensure alignment between design intent and physical implementation.
Participate in technical investigations, design reviews, and tradeoff discussions involving performance, manufacturability, and schedule considerations.
Assist in developing and improving package design methodologies, flows, and best practices.
Contribute to debugging, issue resolution, and package bring‑up activities as needed.
Requirements: Bachelors degree in Electrical Engineering or a related field.
5+ years of experience in package, PCB, or high‑speed design engineering.
Strong understanding of high-speed signal design and power distribution networks (PDN).
Familiarity with industry-standard EDA tools for layout and design.
Strong communication skills with the ability to collaborate and coordinate effectively with cross-functional teams
Preferred Qualifications:
Masters degree in Electrical Engineering
Experience with advanced packaging technologies, interposers, or multi‑die systems
Knowledge of silicon floor planning, signal integrity (SI), and power integrity (PI) considerations
Proven track record to drive design improvements and lead stakeholder coordination throughout the design process
This position is open to all candidates.