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We are seeking a highly technical Program Manager to join the Execution Program Management Team. In this role, you will drive end-to-end execution across multiple development teams, ensuring delivery against strategic, technical, and operational goals. You will work closely with engineering, research, validation, data, and infrastructure teams to translate roadmaps into executable plans, proactively manage risks, and maintain high development velocity in a complex deep learning environment.
What will your job look like:
Lead execution planning across multiple development teams, ensuring alignment with product milestones and company objectives.
Build and manage detailed execution plans covering feature development, validation cycles, data readiness, infrastructure capacity, and integrations.
Monitor progress and proactively drive issue resolution to maintain predictable delivery.
Define, track, and analyze execution KPIs
Identify execution bottlenecks and drive corrective actions across engineering, data, and infrastructure domains.
Support roadmap planning by aligning feature scope with compute resources, validation bandwidth, and data availability constraints.
Facilitate execution reviews using dashboards, logs, performance reports, and validation summaries.
Coordinate across research, software engineering, DevOps, validation, and infrastructure teams to resolve blockers.
Drive transparency, accountability, and operational rigor across stakeholders.
Help diagnose failing tests, integration conflicts, data gaps, and infrastructure bottlenecks.

We are seeking a highly motivated and dynamic Technical PM to join our Platform Software department and play a key role in shaping the future of autonomous driving systems.
This is a unique opportunity to work with top-tier engineering teams and take part in the development of our most advanced systems.
What will your job look like:
Lead the end-to-end execution of project deliverables, including requirements definition, planning, execution, and delivery.
Drive and participate in technical discussions, proactively remove obstacles, and act as both the unifying force within the team and the leader setting direction.
Ensure timely and high-quality delivery of complex, multidisciplinary projects.
Coordinate work across a large cross-functional organization, covering diverse aspects of the system: from algorithm acceleration to sensor integration, from OS development to advanced in-vehicle visualization.
Represent the group in project-level forums, prepare status reports, and communicate effectively with senior management.
Collaborate closely with R&D groups, engaging in technical discussions within a highly multidisciplinary environment.

Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

Were expanding our teams and looking for an Experienced Physical Design Engineer who is ready to make a massive impact
NOTE: By applying for this position, you will have the opportunity to indicate your preferred work location: Haifa or Petach Tikva.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).

Were looking for a Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS.
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff: on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

Our Unit Level Verification Team in Haifa is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like:
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS.
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for an experienced DFT Engineer.
This is an exciting opportunity to join a team of highly talented engineers, working on one of the most cutting-edge technologies - Autonomous Vehicle (AV) SoC.
We know that the idea of a fully autonomous car is no longer science fiction, but a reality that we are creating!
We have spent more than 15 years developing the world's most Advanced Driver Assistance Systems (ADAS) and we are now leading the computer vision and machine learning domain, reaching fully automated driving experience (AV).
What will your job look like:
Develop all the necessary HW / FW / SW for the different modules.
Verify and Validate our design.
Debug and analyze coverage and yield loss.
As a cutting edge technology company, we are working only with the very advanced DFT tools and features, while developing our own methods and DFT concepts - as it required by the Automotive and Safety related products market (ISO26262).

Our Unit Level Verification Team is looking for an experienced verification engineer to be involved in the development of our future AI and deep learning HW accelerators.
This is an exciting opportunity to join a team of highly talented engineers, working on the most cutting-edge technologies to deliver our EyeQ future chips, aimed to power the worlds first fully Autonomous Vehicle!
What will your job look like:
Define, implement and enhance verification environments using UVM methodology.
Write and debug tests that combine UVM methodology and SW code.
Identify and write various types of coverage measures.
Collaborate with designers, architects, and SW developers from Haifa and Jerusalem teams to deliver the most comprehensive verification environment.
Integrate Industry Standard (such as AXI and OCP) and other 3rd party VIPs.

We are looking for a Signal Integrity Engineer to join AV group and develop of the next generation of Autonomous Driving products.
We are a leading innovator in the automotive industry, dedicated to delivering cutting-edge technology and solutions. We are committed to advancing automotive safety, efficiency, and connectivity through our state-of-the-art ECUs.
We are seeking a highly skilled Signal and Power Integrity Simulation Engineer to join our hardware engineering team. In this role, you will be responsible for analyzing and optimizing signal and power integrity in complex electronic systems. You will work closely with design and validation teams to ensure high-performance designs that meet industry standards.
What will your job look like:
Conduct signal integrity (SI) simulations for automotive electronic systems, analyzing and optimizing high-speed interfaces, such as LPDDR4/5, PCIe Gen4/5, A/C/D-PHY, Multi Giga-Bit Ethernet .
Conduct Power integrity (PI) simulations, optimizing target impedance and AC coupling in power delivery networks to ensure optimal performance and reliability.
Collaborate with Silicon & Hardware design engineers, IP providers, Electrical and System Validation teams, EDA tools vendors, and product managers to address SI/PI issues and provide actionable design recommendations.
Engage in joint simulation and measurement efforts with the Electrical Validation team to facilitate comprehensive validation of designs. Perform root cause analysis on signal and power integrity failures and propose effective corrective actions.
Generate comprehensive reports and presentations to communicate simulation findings and design strategies to technical and non-technical stakeholders.

We are looking for a Senior Hardware Engineer to join our AV Platform group in Israel to design the next generation of autonomous driving systems.
What will your job look like:
Board design including High-speed interfaces and power design.
Work with PCB Layout Engineers for multilayer PCBs.
Define and accompany Si/Pi simulation activity and/or execute such simulations when required.
Accompany Mechanical Design and Thermal/Mechanical simulation.
Execute Board Bring-up and take care of suitable test report documentation.
Prepare, HW/SW Interface documentation, as well as any HW manual board required.
Lead complex debug, fault analysis activities, and find creative solutions.
Accompany Validation and automotive Qualification tests (DVT/PVT).
Direct communication with customers, suppliers, architects, project managers, and various stakeholders.