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Join our GPU Hardware Verification team in Raanana, Israel, and help shape the future of the worlds most widely deployed GPU architecture Mali. As a Principal Verification Lead Engineer, youll guide the technical direction for complex GPU verification programs, mentor talented engineers, and influence methodologies that set the standard for our next-generation graphics processors. Your work will make a visible impact across multiple projects, ensuring that our technology continues to deliver outstanding performance and quality for millions of users worldwide.

What Youll Do:
Define and lead verification strategies for sophisticated GPU systems.
Shape and evolve verification methods and frameworks to improve coverage, scalability, and efficiency.
Anticipate challenges and design practical, forward-thinking solutions that help multiple teams succeed.
Lead the Technical Vision:
Take full ownership of end-to-end verificationplanning, execution, and deliveryfor advanced GPU components and subsystems.
Apply advanced techniques such as coverage-driven, random, and formal verification.
Be responsible for verification reviews, sign-offs, and integration of block-level and system-level environments.
Collaborate and Influence
Act as the primary technical contact across Architecture, Design, and Product teams.
Coach and mentor engineers, helping them grow their skills and confidence.
Chip in to continuous improvement in our verification tools, flows, and CI systems.
Innovate with Purpose:
Bring creativity and technical excellence to how we verify hardware.
Drive automation and efficiency through scripting and next-generation verification tools.
Represent our leadership in verification internally and externally.

we are looking for a Senior VLSI Verification Engineer to join the ride as we spearhead the next revolution in electronics!
Responsibilities

Develop and maintain advanced verification environments using SystemVerilog and UVM, ensuring scalability, configurability, and reusability across multiple IPs.
Design, implement, and execute comprehensive testbenches and random test suites to validate functional correctness, robustness, and corner-case behavior of complex IP within various SoC integration environments.
Drive coverage closure by defining, collecting, and analyzing code and functional coverage metrics; identify verification gaps and ensure complete validation of feature sets prior to sign-off.
Lead debug and root-cause analysis efforts in collaboration with senior verification and design engineers, leveraging carefully crafted logs, waveform analysis and assertions to isolate and resolve design or environment issues.
Collaborate closely with architecture, design, and firmware teams to ensure verification completeness, alignment with design intent, and seamless integration at the system level.
Contribute to methodology and infrastructure improvements, including reusable UVM components, automation scripts, and best practices that enhance team efficiency and verification quality.

seeking a System Software Validation Lead to define validation methodologies, set quality standards, and drive a culture of quality across multidisciplinary hardware and software systems. This leadership role emphasizes process ownership, methodology enforcement, and coaching teams, while also providing technical guidance and hands-on validation expertise.

abra R&D is seeking for a Verification Engineer. We are looking for a skilled Block-Level Verification Engineer with 4 years of experience to join our team. The role involves developing spec-based verification environments, including building and maintaining simulation setups, writing tests, and conducting functional verification processes. A full-time hybrid position, based in central of Israel. ?Key Responsibilities:
* Analyze functional specifications and translate them into a complete verification plan.
* Develop and build verification environments using SystemVerilog/UVM
* Write testbenches and automated tests
* Perform simulation result analysis, debugging , and bug fixing.
* Work with coverage metrics (functional and code coverage) to ensure full test coverage.
* Collaborate closely with design teams to identify and resolve issues.

We are looking for an excellent Senior Firmware Verification Engineer for our FW PHY verification Group. The person will be part of FW PHY verification of our Products. Will closely work with our FW PHY development, architecture teams and gain deep understanding of our products and technologies.

What you'll be doing:

Own the responsibility for delivering Networking features and their verification aspects.

Define, develop and maintain verification infrastructure and regression tests suites - make test suites robust, maintainable and easy portable.

Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results.

Innovate! Bring our product to next quality level.

From early micro-architecture, design and verification, to post silicon validation - the team is responsible for the chip across it's full life cycle.
Our chip is one of the most complex chips in the industry.

Our Networking Software Group is rapidly growing, and we are hiring a Software Engineer for the InfiniBand Switch Software Development team. Come and join a diverse group of engineers spread across the globe who come together in small close knit teams to innovate and develop groundbreaking solutions.

As a member of the team, you will be a part of a cutting-edge Python-based SW project using advanced techniques to solve complex issues. You will gain unique knowledge of how operating systems work, Linux kernel and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge? The Networking Hardware Acceleration team develops a cutting-edge, high speed API for NVIDIAs Network Interface Cards (NICs). We power foundational projects like DPDK and DOCA-Flow, driving next-generation networking performance. Join us to gain deep insights into NVIDIAs hardware acceleration technology and make a meaningful impact on both software and hardware innovation.

What Youll Be Doing:
Learn new networking features, plan their verification strategy, and implement it on top of a Python-based in-house developed environment.
Design, develop, optimize, and maintain an OS/Kernel verification testing platform.
Collaborate with team members, architects, design, QA teams, and customers (both external and internal).
Innovate! We are always looking for new ways to make NVIDIA's Networking driver products shine in customers' eyes.

We are looking for best-in-class Chip Design Verification and Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a significant part in designing and verifying our groundbreaking and innovating new chips, enjoy working in a meaningful, growing and highly professional environment where you make a huge impact in a technology-focused company.

What you'll be doing:

Take a crucial part in developing our next-generation chip controller.

Design and verification with challenging multi-discipline context.

Take part in the development of all our networking and GPU networking chips and systems.

We are now looking for a Chip Design Verification Engineer. We are seeking a verification engineer to join the chip design methodologies team. The team is in charge of the verification methodologies, shared code, training, and embracing new technologies. One of our main goals is to make sure that the team works in an efficient manner, and provides high-quality deliveries. This position offers the opportunity to have real impact in a dynamic, technology-focused company.

What you'll be doing:

Develop shared verification code and solutions to be widely used by the chip design team.

Develop groundbreaking methodologies to create a flawless experience for verification engineers to keep the focus on new problems.

Collaborate with the design automation team to provide end-to-end solutions that combine verification, simulation, and automation.

Get in touch with EDA vendors to learn about cutting-edge tools/technology and apply them into our verification process.

Understand the design, define the verification scope, develop the verification infrastructure and verify the correctness of the design.

Collaborate with designers, verification specialists to accomplish your tasks.

Develop training sessions.

Our DOCA Verification team is seeking a highly motivated and hardworking Software Engineer with hands-on capability technical experience, to verify the design and implementation of the next generation Data Processing Unit Software, with wide range of features related to cyber security and embedded systems.

This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting data centers across the world. We're united in our quest to transform the way Smart Adapters are used.

What you'll be doing:

Work with some of the best engineers to define, plan, and develop Testing platforms and infrastructure.

Build and continuously reform verification infrastructure and methodologies to meet the demands of next generation DPU

Work closely with customers and end users to collects requirements and understand use cases

Deep engagement in our products and services.

We are looking for a talented, fast learner, and highly motivated Chip Design Verification Engineer. As a member of our Chip Design Team, you will be responsible for verifying portions of the design, of a high performance and low power chip, focusing on such tasks as micro-architectural understanding, Verification environment coding and logic debug. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines roadmap. We have crafted a team of extraordinary people, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll be doing:

As a member of our Chip Design team, you'll own and be responsible for crafting and timely delivery of a verification components and quality of Chip Design related logic. Day to day tasks include:

Understand and analyze uArch definitions.

Implement verification components to verify RTL meets specifications.

Collaborate with our RTL, Arch and uArch teams.

Work on logic related to switch design.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for an excellent Senior Optics Firmware Verification Engineer for our FW PHY verification Group. This position will be part of our growing team, which enables our products to meet the industry-leading benchmarks of efficiency and quality. We develop a collaborative and inclusive work environment, where ideas are shared and innovation is encouraged. Will closely work with our LinkX and FW PHY development, architecture teams and gain deep understanding of our products and technologies.

What you'll be doing:

Own the responsibility and technical understanding for delivering Networking features and their verification aspects.

Define, develop and maintain verification infrastructure and regression tests suites - make test suites robust, maintainable and easy portable.

Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results.

Leverage AI to validate the next-generation networking features.

Innovate! Bring our product to next quality level.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.