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We are looking for a Senior Network & Security Engineer to join our dynamic IT team.
Design, deploy, and operate enterprise and datacenter network infrastructure.
Manage and troubleshoot LAN, WAN, WLAN, VPN, and security environments.
Configure and maintain routers, switches, firewalls, load balancers, and related infrastructure.
Design and implement scalable network architectures based on modern cloud and hyperscale principles.
Drive network automation using Python, Golang, Shell, or similar technologies.
Build and enhance self-service infrastructure platforms supporting engineering and lab environments.
Monitor network performance, availability, and security using automated monitoring and alerting systems.
Collaborate closely with Infrastructure, Security, and Engineering teams to implement security controls and best practices.
Participate in architecture reviews, capacity planning, disaster recovery, and operational excellence initiatives.
Mentor team members and contribute to technical leadership across

We are looking for a Senior Network & Security Engineer to join our dynamic IT team.
Design, deploy, and operate enterprise and datacenter network infrastructure.
Manage and troubleshoot LAN, WAN, WLAN, VPN, and security environments.
Configure and maintain routers, switches, firewalls, load balancers, and related infrastructure.
Design and implement scalable network architectures based on modern cloud and hyperscale principles.
Drive network automation using Python, Golang, Shell, or similar technologies.
Build and enhance self-service infrastructure platforms supporting engineering and lab environments.
Monitor network performance, availability, and security using automated monitoring and alerting systems.
Collaborate closely with Infrastructure, Security, and Engineering teams to implement security controls and best practices.
Participate in architecture reviews, capacity planning, disaster recovery, and operational excellence initiatives.
Mentor team members and contribute to technical leadership across.

we are seeking a highly motivated Power Integrity Engineer to join our Hardware Engineering team. In this role, you will be responsible for defining, analyzing, simulating, and validating power delivery networks (PDNs) for next-generation networking platforms supporting high-performance ASICs, advanced SerDes interfaces, optical modules, and AI-scale networking systems.
You will work closely with hardware architects, PCB designers, ASIC teams, signal integrity engineers, mechanical engineers, and manufacturing partners to ensure robust power delivery, optimal system performance, and successful product deployment.
Responsibilities
Lead Power Integrity (PI) activities throughout the hardware development lifecycle, from architecture through production.
Define and optimize board-level and package-level Power Delivery Networks (PDNs) for high-current networking ASICs and supporting devices.
Perform pre-layout and post-layout PI simulations using industry-standard tools.
Establish target impedance requirements and validate compliance across all power rails.
Analyze DC voltage drop, AC impedance, transient response, and power distribution performance.
Collaborate with PCB layout engineers to optimize stackups, plane structures, decoupling strategies, and power routing.
Work closely with Signal Integrity engineers to ensure SI/PI co-optimization of high-speed interfaces.
Develop power integrity design guidelines and best practices for next-generation networking products.
Support schematic reviews, layout reviews, and design sign-off activities.
Perform laboratory measurements and correlation using oscilloscopes, VNAs, power analyzers, current probes, and related equipment.
Investigate and resolve PI-related issues during board bring-up, validation, and production.
Collaborate with ASIC, FPGA, memory, optics, and power component vendors to optimize overall system performance.
Drive continuous improvement of PI methodologies, simulation flows, and validation processes.

we are looking for a Director of Product Marketing & Brand.
What you'll do
Own messaging framework, which is the single source of truth for how the company talks about what it does and why it matters.
Build and maintain persona-level, product-level, and industry-level positioning that holds up in the field, including in a sales conversation, an analyst briefing, a paid campaign, or a press interview.
Translate product releases, market shifts, and competitive moves into messaging updates that reach every function fast.
Own brand identity: visual standards, tone of voice, brand book, asset templates, and 10x our creative output.
Own the communications and PR strategy, specifically how shows up in press, analyst relations, and industry conversations.
Activate these narratives across every channel, in collaboration with Growth, to drive pipeline and brand awareness.
Grow and nurture your team, empowering them to achieve their targets and career goals.
Operationalize AI across every key content, creative, and GTM process.

We're hiring a Quality Lead to own that. Why this role is different: you won't run a traditional QA team that tests features at the end. You'll own the quality gates inside the Machine and in production, author the monitoring skills our pods rely on, and hold independent authority to fail the Machine's output. Quality is our north star, and this role sets the bar.
THE MISSION: Make reliability, performance, and user experience a property of the system - not of individual heroics. Build and lead a Quality function (~9 people) that keeps an AI-native delivery org fast and trustworthy, and give the business confidence that what the Machine ships is safe to ship.
WHAT YOU'LL DO:
Own quality gates in the Machine - prose-driven tests (generated from requirements, not the code), adversarial / agent-checks-agent review, static analysis and code-quality remediation (e.g. SonarCloud), and CI gates that run before anything reaches a human.
Own quality in production - release verification, production testing, and ownership of change-fail and deployment-rework rates.
Author monitoring guidelines & reusable observability skills that delivery pods and the Machine consume - so monitoring is built in, not bolted on.
Own the evals that score the Machine's output for behavioral consistency and reliability - treating evaluation as a first-class engineering discipline.
Act as an independent governance voice - with the authority to block or fail output that doesn't meet the bar, partnering closely with Architecture.
Partner with the Core Platform team on the quality of customer-issue fixes and existing functionality.
Lead, coach and grow the team - quality/gate engineers, an agent-evaluation engineer, production-monitoring (SRE) and QA-infrastructure engineers.
Set the quality metrics and report them - DORA + deployment-rework rate, escaped-defect rate, review-queue depth, eval pass rates.

we are seeking a Senior Product Manager focused on Switch platform hardware to be a key member of our Product Management team. Join a dynamic and forward-thinking company at the forefront of network transformation. We leverage advanced technologies to develop innovative solutions that drive efficiency, scalability, and exceptional network performance. Collaborate with the industrys best as we partner with hyperscalers, NeoClouds, and leading enterprises, shaping the future of disaggregated networking infrastructure. Our environment fosters creativity, teamwork, and growth, and offers you the opportunity to make a meaningful impact while working on groundbreaking hardware systems.
As a Senior Product Manager focused on Switch Hardware Platforms, you will drive the development, definition, and lifecycle management of high-end networking systems for AI fabrics. Your work will directly impact the performance, scalability, and reliability of next-generation network infrastructure, enabling customers to deploy and operate large-scale networks efficiently.
Responsibilities
Act as a hardware product expert specializing in high-end networking systems and system-level architecture, providing strategic direction across the product lifecycle.
Define and lead hardware product strategy, including system architecture, platform definition, and roadmap planning for next-generation switching and routing platforms.
Collaborate closely with engineering teams to develop product specifications, drive design trade-offs, and deliver high-quality hardware systems including PCB design, thermal solutions, power systems, and mechanical architecture.
Own end-to-end product lifecycle management from concept through development, validation, manufacturing, and deployment, ensuring timely delivery and high-quality execution.
Work with contract manufacturers, ODMs, and supply chain partners to ensure successful product manufacturing, certification, and deployment at scale.
Partner with marketing and sales teams to define product positioning, develop go-to-market strategies, and support customer engagements.
Engage with customers to gather requirements, validate solutions, and prioritize features that enhance product competitiveness and customer satisfaction.
Monitor product performance post-launch, analyze key metrics, and drive continuous improvements and future product iterations.
Prepare and present product plans, business cases, and status updates to stakeholders and executive leadership.

We are looking for an experienced Senior Signal Integrity Engineer to join our Hardware Engineering team. This role focuses on ensuring optimal signal integrity for high-speed interfaces, including Ethernet, PCIe, DDR5, and other next-generation technologies. As part of the team, you will be responsible for performing signal integrity analysis, developing signal integrity models, and ensuring electrical compliance for high-speed SERDES I/Os.
Responsibilities:
Conduct signal integrity analysis and simulations for high-speed interfaces such as 112Gbps Ethernet, PCIe Gen5, and DDR5 interfaces.
Develop and implement signal integrity guidelines for PCB design, ensuring high-performance and low-loss signal paths.
Analyze and resolve signal integrity issues related to high-speed interfaces, including reflection, crosstalk, and power delivery network (PDN) issues.
Collaborate with PCB layout engineers to optimize design for signal integrity, ensuring compliance with electrical standards and high-speed design best practices.
Perform time-domain and frequency-domain analysis, including loss, jitter, and eye-diagram analysis.
Utilize EDA tools such as Ansys SIWAVE, HFSS, or similar for simulation and validation of signal integrity designs.
Work closely with cross-functional teams to integrate signal integrity considerations into the overall hardware design process.
Develop behavioural models based on measured signal integrity data to inform future design and simulation work.
Conduct pre- and post-layout simulations and measurements for high-speed signal interfaces.