Join our innovative SoC hardware development team as a UPF Methodology Engineer. In this role, you'll play a key part in defining the flow for next-generation UPF, enhancing our existing UPF framework, and ensuring its successful implementation and verification across our mobile products.
Your primary focus will be to advance our UPF methodology, improving power intent definition,
implementation, and verification for cutting-edge mobile products.
Key tasks include:
Driving coverage of power intent through static and dynamic checking methodologies.
Implementing custom UPF to meet specific project needs.
Leading UPF implementation and sign-off processes for FE and P&R.
Performing checks on power intent for custom circuits.
Collaborating closely with designers and the design verification team to debug and resolve any UPF flow issues.
Responsibilities:
We're seeking a candidate with strong expertise in ASIC design methodology, particularly focused on power definition. Ideal qualifications include:
Proficiency in UPF implementation and verification.
Strong skills in scripting languages such as Python and Tcl.
Familiarity with CMOS design power.
Familiarity with multi-voltage static checkers (e.g., VSILP/VCLP, CLP).
Knowledge of the full RTL-to-GDS flow
Excellent communication skills, as you'll interface with diverse teams.
Requirements: Minimum Qualifications:
Bachelor's or Master's degree in Electrical Engineering (EE/EECE/EECS) required.
Preferred Qualifications:
Proficiency in UPF implementation and verification.
Strong skills in scripting languages such as Python and Tcl.
This position is open to all candidates.