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We're looking for a hardware u/architect for our switch division. In this position, as part of a small (~10 employees) elite team, you will have the chance to define the architecture of our next generation switch product lines performance, both Ethernet and InfiniBand. Your role will be cross-disciplinary, working with software, ASIC design, verification, physical design and platform teams to improve performance and debug.

What you'll be doing:

Learn and understand the switch u/architecture thoroughly across all aspects and become a source of information for the design and verification engineers.

Define the implementation of the most sophisticated performance features of our next products, balancing architecture requirements with backend, execution, and design considerations.

Define the implementation of debug capabilities to support performance validation and improvements

Understand our system requirement and help define the POR of our switch product line.

Face the most challenging Full-Chip correctness and performance issues, which cannot be handled by the units designers as they require full cross-unit understanding of the chip.

Work closely with board and package design to understand the different design limitations: power, di/dt, temperature, signal-integrity etc.

Thoroughly understand Ethernet, InfiniBand and NvLink protocols.

We are looking for a Chip Design micro architect for the Networking Silicon group. As a chip micro architect in out Networking business unit, you will join a group of passionate engineers to implement the next generation state-of-the-art BlueField DPU SOC and/or ConnectX NIC that deliver breakthrough networking, security, cloud, AI and storage performance to the AI data centers. As a design micro architect, you will make a real impact in a dynamic, technology-focused AI company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:
You will be part of a small and exclusive micro-architecture team and have the opportunity to make a real impact in designing the micro-architecture of the next generation state of the art network card hand in hand with the product architect making sure implementation meets the product goals.
Work closely with architecture and design teams to thoroughly understand system requirements and identify micro-architecture solutions, while weighing trade-offs related to performance, area and power consumption
Break high-level arch requirements into lower-level design building blocks. Focal point for the design team, reviewing implementation and guiding the team.
Find bottlenecks early in the development cycle using performance analysis and simulations
Use your understanding of the entire chip and system to identify and debug pre and post silicon full-chip issues

we are looking for a Senior HW System Architect.
As a Senior HW System Architect, your role will be to work closely with our OEM partners and realize a successful integration of the ADAS to self-driving technology in these platforms.
** This role requires working from our Jerusalem site at least 1 day per week. It also offers the flexibility to work part-time from our other sites, subject to seat availability.
What will your job look like?
Lead end-to-end life cycle of the System architecture - from analyzing OEMs (customers) technical requirements to HW architecture definition, development and verification to ensure integration ofproducts into the vehicle platform.
Work in close collaboration with various groups including algo, HW design, verification, SW architect, Mechanics, and simulations.
Provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
Responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
Provide practical system architecture definition to board designers and SW/algo by managing system external Interconnects and internal interfaces, SoC, MCU, definitions and optimization (based on OEMs requirements and other constraints)

we are looking for a Senior HW System Architect.
As a Senior HW System Architect, your role will be to work closely with our OEM partners and realize a successful integration of the ADAS to self-driving technology in these platforms.
** This role requires working from our Jerusalem site at least 1 day per week. It also offers the flexibility to work part-time from our other sites, subject to seat availability.
What will your job look like?
Lead end-to-end life cycle of the System architecture - from analyzing OEMs (customers) technical requirements to HW architecture definition, development and verification to ensure integration of products into the vehicle platform.
Work in close collaboration with various groups including algo, HW design, verification, SW architect, Mechanics, and simulations.
Provide architectural guidance and tradeoff recommendations throughout the whole design process from concept through production.
Responsible for the main components selection and technical evaluation (trade-off between cost/performance etc.)
Provide practical system architecture definition to board designers and SW/algo by managing system external Interconnects and internal interfaces, SoC, MCU, definitions and optimization (based on OEMs requirements and other constraints)

we are looking for a Senior Hardware Architect for Mobile broadband.
As a senior architect you will be a leader, someone who brings into the company new ideas and helps drive next generation wireless products
Responsibilities:
Be a leader in the Mobile Broadband team, architecting state-of-the-art modems for next generation cellular solutions. Investigate, invent, develop, innovate wireless modem components. Drive the implementation phase with the VLSI, Software and Algorithm teams.

We are seeking a highly motivated High-Performance System Architect to join our team of experts and help shape the future of high-performance and ML / AI computing. Our next-generation NVL systems will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used at almost every industry today, such as car and Pharmaceutical. As a high-performance system architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation networks that will be used by top researchers and engineers around the world.

What youll be doing:

Define the NVL system architecture end-to-end, by internal requirements and customers requirements through all product life cycles (post/pre silicon, on deployments).

Research of various solutions to enable the next large-scale-high-performance computing clusters. The position spans over various layers from algorithms, software, firmware, and HW.

Developing models for simulations and performance testing, analysing the results and development of future HW and SW.

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and research teams, to ensure the successful execution of the project.

We are seeking a dedicated NVLink Firmware Architect to join our esteemed engineering team in Israel. This is an outstanding opportunity to impact the future of data centers and networking technology. As a key member of our team, you will play a crucial role in developing and crafting our NVLink firmware stack and GPU scale-up networking. Our collaborative environment, combined with ambitious goals, will enable you to collaborate closely with ASIC and software architecture/design teams to pioneer innovative solutions.

What you'll be doing:

Collaborating with a team of innovative engineers to craft new networking applications that address sophisticated problems in groundbreaking ways.

Identifying and evaluating new technologies, innovations, and partner relationships to align with our strategic technology roadmap and enhance business value.

Defining the architecture of NVLink firmware running on GPUs and switches, ensuring flawless integration and performance.

Helping to determine and implement the strategic vision for NVIDIA networking alongside adjacent software and hardware architects.

We are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities:
Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.
Act as Functional Safety manager, leading the definition, execution and oversight of functional safety strategy and processes-ensuring compliance with standards (such as ISO 26262), driving hazard and risk analyses, coordinating cross-functional teams, and embedding safety-culture across product development.

What you'll be doing:

As a member of our Hardware architecture deep learning team, you will contribute to features that help next-generation GPUs and systems advance the state of AI.

This position requires you to collaborate with other hardware and software engineers as well as DL researchers.

Your day to day work will include analyzing the behavior of various deep learning methods on current and future hardware architectures and propose new features to accelerate it. The features could be HW, SW or Algorithmic - usually combining all.

The main focus of this job is from hardware architecture perspective and workload performance.

Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

About the group:
Highly experienced Group in switch processing including HW and SW architecture with deep background in the high-speed networking world. Our innovative packet processors are designed into the most advanced data centers by tier-1 vendors.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs.

We are looking for an experienced and creative AI processor VLSI Architect to architect and model the core of our next generation processors.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Micro architect will take charge in defining a processor Micro architecture features that will improve the performance and reduce the power consumption of the CPU core. This architect will use a performance simulator to explore his ideas and will analyze implementability of these features: Power, Timing, Area. This architect will utilize his processor and VLSI design experience to develop many advanced features for Huawei processors.

The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

The CPU core Architect representative will be a member of the processor core architecture team. He will be responsible of the technical communication between the team in Israel and the team in China. He will be presenting and explaining Microarchitecture features developed by architects in Israel, collecting requirements, answering question. He will be responsible to hold deign reviews with the team in China. He will also be proposing new Micro architecture features based on his own ideas. take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products. The CPU core architect representative would be relocating to China for an extended period after getting familiar with the team in Israel.