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We are looking for a talented Embedded SW Architect to be part of this exciting journey.

Responsibilities

Designing SW architecture of high complexity heterogeneous multi-core ASIC device.
Definition of the different SW layers of the system and their relations: data-path, control-path and management.
Analyze top to bottom functionality and SW slices - RTOS, kernel, firmware, drivers.
Designing the SW according to automotive known standards such as safety and security standards.
Recommend and influence the ASIC HW architecture - performance, usability and visibility.
Responsibility for the definition of SW sequences such as boot procedure, fail-safe scenarios and more.

we are a global pioneer of RADAR systems for active military protection, counter-drone applications, critical infrastructure protection, and border surveillance.
Join Our Team as a System Architect at our company!
Technical Characterization and System Design:
Spearhead the technical characterization, system design, and architecture of radar-based electronic systems.
Drive innovation and efficiency in system design processes, ensuring optimal performance and reliability.
Leadership in Field and Lab Experiments:
Lead field and lab experiments to validate and optimize system functionalities.
Collaborate with cross-functional teams to plan system tests layout, ensuring comprehensive and insightful results.
Performance Data Analysis:
Analyse system performance data to derive meaningful insights and recommendations.
Implement data-driven improvements and optimizations to enhance overall system efficiency.

we are looking for a SoC / IP Architect to shape the next revolution in electronics!
Responsibilities

Define and design architecture: Create the overall SoC/IP architecture based on product and customer requirements and define detailed technical specifications.
Collaborate with cross-functional teams: Work with a variety of teams, including logic design, verification, firmware architecture and development teams, and physical design, to ensure successful execution.
Lead technical discussions and architectural reviews, guiding design and verification teams to deliver scalable, high-quality implementations.
System-level integration: Ensure seamless hardware-software co-design by working on aspects like control paths, interrupt schemes, and debug infrastructure.
Drive architectural decisions that optimize scalability, and future readiness for next-generation applications.
Act as Functional Safety manager, leading the definition, execution and oversight of functional safety strategy and processesensuring compliance with standards (such as ISO 26262), driving hazard and risk analyses, coordinating cross-functional teams, and embedding safety-culture across product development

We are seeking an exceptional and highly experienced Senior System Engineer to join our elite HW R&D team. This role is suited for a seasoned professional (15+ years of experience) in the networking and telecommunications industry, with a proven track record in multi-platform system architecture, hardware/software integration, and deep protocol-level understanding. The ideal candidate will lead and define end-to-end system behavior across multiple layers, ensuring alignment between hardware platforms and software stacks.
You will work closely with internal and external stakeholders to define detailed system specifications, drive platform validation, and ensure our solutions are reliable, efficient, and meet the demanding requirements of service providers.
Key Responsibilities
System Architecture & Design
Own the end-to-end system architecture across various company platforms (routing, switching, timing, and synchronization platforms).
Define and maintain system-level functional specifications and engineering requirements documents (ERDs), covering HW-SW interfaces, thermal, mechanical, power, and performance constraints.
Evaluate and drive platform-level trade-offs (e.g., performance vs. power, scalability vs. complexity).
Collaborate with hardware design, software architecture, thermal, and mechanical teams to ensure cohesive system integration.
CPU selection, boot methodologies, FW upgrades, IC programming, etc.
Technical Leadership
Act as the technical authority on system behavior, network feature interaction, and platform compatibility across various ASIC vendors.
Drive design reviews, providing critical input on system-level implications and interactions.
Detailed Specifications & Documentation
Develop comprehensive and structured documentation: platform requirement specs, interface control documents (ICDs), test coverage matrices, thermal analysis reports, power budgets, and system bring-up guides.
Create and maintain clear, accurate, and implementation-ready specifications to be used by hardware, software, validation, and operations teams.
Thermal, Power & Mechanical Integration
Analyze and approve cooling methods and thermal design requirements (airflow, heat sinks, thermal interface materials, etc.).
Analyze power distribution planning, and integration with PSU/voltage regulator designs.
Work closely with mechanical engineering.

We are looking for a Senior Core Power Management Architect.
Job Description:
Will drive the implementation of autonomous core power management for best performance and power efficacy.
The Power expert will take charge in understanding business-units (customers) needs, and translate them to CPU core solution.
This expert will utilize his power management experience to deliver world-class power efficient HW-SW solutions for Huawei products.
Responsibilities:
Responsible for bringing Huawei CPU to a leading position in Performance-Power efficiency.

We are looking for a Senior HW architect.
What will you be doing?
Definition of our next generation Packet Processor/Datapath/congestion management architecture for high-performance complex SoC Ethernet Switch.
Define the architecture from requirements to production.
Architecture & micro-architecture definition for the systems and its blocks.
Support the development group by delivering specs

We are looking for a Senior CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are looking for a CPU Core Architect representative.
The CPU core Architect representative will be a member of the processor core architecture team.
He will be responsible of the technical communication between the team in Israel and the team in China. He will be presenting and explaining Microarchitecture features developed by architects in Israel, collecting requirements, answering question.
He will be responsible to hold deign reviews with the team in China.
He will also be proposing new Micro architecture features based on his own ideas. take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture.
This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.
The CPU core architect representative would be relocating to China for an extended period after getting familiar with the team in Israel.

We are looking for a CPU Core Architect.
The CPU Architect will take charge in defining a processor core that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

Our goal is to design cutting-edge CPUs for smartphones, servers, and desktops, and we need the very best talent to help us achieve it!
The CPU Architect will take charge of defining a processor on chip inter-connect and coherent fabric that meets the requirement of high performance, high bandwidth, and scalable processing architecture. This architect will utilize his processor experience to deliver a world-class processor ASIC with many advanced features for Huawei products.

We are seeking a highly motivated Chip Design Architect to join our team of experts and help shape the future of high-performance computing. Our next-generation Infiniband and NVL switches will be at the forefront of connecting and powering the world's most advanced compute clusters, from supercomputers used in AI research to high-performance clusters used in industries such as finance and research labs. As a Chip Design Architect, you will have the opportunity to work on some of the most cutting-edge technology and help to drive the innovation of our next generation of switches that will be used by top researchers and engineers around the world. The products you'll develop will be integrated in many leading-edge compute clusters, and supercomputers, and you'll be part of a team with a strong track record of success.

What you will be doing:

Collaborate with cross-functional teams, including other architecture teams, logic design, system software, firmware, and hardware teams, to ensure the successful execution of the project.

Define the HW boot, clock and Reset architecture for Switch ASIC.

Develop slow-speed interface architecture specifications and design guidelines, conduct trade-off analysis for different architecture options, and oversee the implementation of the chosen architecture by the chip design / FW / SW teams.

We are currently seeking a Senior Silicon Security Architect.

We are seeking a technical leader interested in defining, crafting, implementing, and guiding the implementation of security research, architecture, implementation, and design for next-generation Networking products. You'll be expected to take a strong hands-on role, working with diverse teams across us and with external partners to meet security requirements for our state-of-the-art network products.

What you'll be doing:

Research, design, develop and implement architecture solutions (Hardware and software) meeting internal and external security requirements and standards.

Apply innovative hardware security primitives to enable next generation secure software extensions supported by hardware.

Collaborate with partners on the implementation of open-source software.

Collaborate across the company to guide the direction of Silicon security, TEE, working with hardware, software, research and product teams.

Architectural modeling, validation, microarchitectural definition, following standards bodies, and developing infrastructure enabling trusted platforms using hardware security methods.

Work with customers, partners to identify and address security issues and threats.