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In the Hybrid Cloud, Zerto drives the innovation agenda and technology roadmap for cutting-edge solutions in data lifecycle management, cyber resilience, replication, ransomware recovery, and seamless migrations. Our mission is to empower businesses with advanced hybrid cloud technologies that ensure data resilience, business continuity, and operational efficiency. With a focus on delivering state-of-the-art solutions, Zerto helps organizations protect, manage, and optimize their data across its entire lifecycle while maintaining robust defenses against evolving cyber threats. By working with customers, we help them reimagine their disaster recovery and data protection strategies, ensuring they achieve their business goals with confidence. Join us to redefine whats next in the hybrid cloud, data protection, and cyber resilience-and for yourself.

Roles and Responsibilities

Design, develop, and enhance I/O subsystems, virtualization, kernel programming, and memory management for cutting-edge system software products.
Drive performance optimization, and efficient memory management.
Perform in-depth debugging, triaging, and resolution of user and kernel-level, performance profiling, and memory-related issues.
Develop innovative solutions, addressing challenges in virtualization, multithreading, and hardware-software interaction.
Explore and implement new methodologies fostering continuous improvement and innovation.
Proactively identify bottlenecks in system design, and recommend and implement robust, scalable solutions.
Stay updated on evolving trends in kernel development, design, and virtualization technologies to bring innovative practices to the team.
Troubleshoot and optimize complex I/O and kernel features to enhance performance, scalability, and reliability.
Collaborate with cross-functional teams to align on design goals and ensure seamless integration with the system architecture.
Exhibit flexibility in taking on new or related tasks, showcasing adaptability and a proactive, problem-solving mindset.
Provide technical leadership in architecture design, problem-solving, and decision-making across complex technical domains.
Lead technical discussions, design reviews, and decisions on critical system challenges, driving the adoption of innovative solutions and best practices.

Appdome’s mission is to protect every mobile app in the world and the people who use mobile apps in their lives and at work.
Appdome provides mobile brands with the only patented, centralized, data-driven Mobile Cyber Defense Automation platform, delivering rapid no-code, no-SDK mobile app security, anti-fraud, anti-malware, anti-cheat, anti-bot implementations, configuration as code ease, Threat-Events™ threat-aware UI/UX control, ThreatScope™ Mobile XDR, and Certified Secure™ DevSecOps Certification in one integrated system.
With Appdome, mobile developers, cyber and fraud teams can accelerate delivery, guarantee compliance, and leverage automation to build, test, release, and monitor the full range of cyber, anti-fraud, and other defenses needed in mobile apps from inside mobile DevOps and CI/CD pipeline.
Leading financial, healthcare, m-commerce, consumer, and B2B brands use Appdome to upgrade mobile DevSecOps and protect Android & iOS apps, mobile customers, and mobile businesses globally. Today, Appdome's customers use their platform to secure over 50,000+ mobile apps with protection of over 1B mobile end users projected.
We are seeking a driven and results-oriented Account Executive to join our team. In this role, you will focus on acquiring new customers, building trusted relationships, and driving revenue growth by understanding prospects’ mobile business and security objectives and aligning them with our solutions.
The ideal candidate is a proactive communicator with strong interpersonal skills and a solid technical foundation. You excel at managing complex enterprise sales cycles and thrive in a dynamic environment that demands collaboration across teams and effective engagement with stakeholders via phone, email, and in-person interactions. About The Position We are looking for a talented Mobile Fraud Engine to join Appdome. In this role, you will develop sophisticated fraud detection and prevention components that operate at the core of our mobile threat intelligence platform — diving into signal processing, risk evaluation logic, and real-time decision-making, and translating your findings into robust, production-ready code. This position is ideal for developers who want to understand how fraud happens and use that knowledge to build innovative solutions that protect millions of mobile applications worldwide. Job Description
* Design, develop, and maintain core fraud detection and risk-scoring components within mobile apps.
* Investigate fraud patterns and mobile threat signals to develop innovative detection and prevention mechanisms.
* Own the collection of threat and device signals used by risk assessment algorithms to perform device and user behavioral profiling.
* Design systems that make split-second decisions, balancing security accuracy with user experience.
* Continuously explore emerging fraud trends and incorporate new detection techniques into our product.
* Collaborate with a multidisciplinary team of engineers, data scientists, and security experts to deliver end-to-end solutions.

Design, implement, and test a state-of-the-art optimizing compiler for Cisco Silicon One
Evaluate and optimize code performance, including debugging, code generation improvements, and pipeline analysis
Develop, optimize, and enhance the compiler backend to fully leverage cutting-edge hardware capabilities
Solve complex resource management challenges across hardware pipelines
Design and implement new P4 language features that empower network application developers
Build and maintain the compiler toolchain for custom networking applications
Contribute to libraries, analysis tools, and supporting infrastructure
Collaborate with cross-functional hardware and software teams
Work closely with ASIC engineers on next-generation IC design, influencing hardware through compiler insights prior to tape-out

We push the boundaries of technology, developing innovative DFT solutions that drive industry-leading programmability, scalability, and performance. Our team operates in a hybrid model, with three days a week in the office in Midtown Tel Aviv or Caesarea, fostering collaboration and technical excellence in a startup-like atmosphere within a stable, global corporation.

Your Impact

As an Experienced DFT Engineer, you will:

Own and drive DFT execution across the full product lifecycle, from pre-silicon design through post-silicon debug and production qualification.

Define and align DFT architecture and strategy in close collaboration with chip architects, design, and verification teams.

Oversee and contribute hands-on to the implementation of DFT features, including ATPG, scan insertion and compression, and memory BIST.

Lead silicon debug activities and root-cause analysis, driving corrective actions to improve yield, reliability, and test quality.

Establish, standardize, and evolve DFT methodologies and best practices across projects.

Develop PHY firmware and system-level features for advanced networking ASICs
Participate in post-silicon validation, including lab bring-up, debugging, and performance analysis
Collaborate closely with PHY, system, firmware, and silicon design teams
Contribute to defining system operation modes and end-to-end device behavior
Help drive the development of next-generation, high-scale networking solutions using cutting-edge silicon technologies

seeking a highly skilled and experienced PCIe Validation Engineer to join our Silicon and System Validation team, playing a key role in the companys core products. This position involves building a complex validation environment from scratch for pre and post silicon, defining test plan execution and debugging failures while collaborating with cross-functional teams. In this role, you will take ownership of the validation from Emulation thru bring-up to product release in quality that meets Next silicons standards.

We are seeking an experienced technical leader to head our collective communication library development team. This role involves leading a team of engineers in developing high-performance collective communication implementations for multi-NPU and multi-node AI workloads.
Key Responsibilities
Lead the design and development of collective communication primitives (All-Reduce, All-to-All, Gather/Scatter and etc)
Architect scalable communication protocols for multi-NPU and multi-node systems
Optimize communication performance for NPU architectures
Provide technical leadership to the team members in NPU programming, distributed systems, and communication protocols
Work with a success-driven worldwide international team (Network, NPU, QA, AI, DL/ML Framework)
Define project milestones, deliverables, and technical roadmaps
Ensure compatibility with major AI frameworks (PyTorch, TensorFlow, JAX).

Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!

Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements. .
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.

looking for a talented and experienced engineer to participate in the physical design of the companys product for leading one of BE projects. This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on product architecture.

We are looking for an experienced STA Lead Engineer to join our growing BE team. We are working on the most challenging and interesting ASIC chips. Come join us and have a big impact on our groundbreaking and innovative designs.

We are seeking a talented Code Generation and Optimization Expert to join our bleeding-edge CodeGen team in Israel. In this high-visibility, hands-on role, you will play a pivotal part in building next-generation runtime compiler.

We are searching for an innovative Software Engineer that will join us and be part of a SW team
In this role you'll:
Be responsible of the full life cycle development of several key applications including: Technical and statistical research, design, coding and integration
Developing and integrating new and existing software as part of a large-scale system
Tackle tough problems and find creative ways to solve them
Write high quality, functional code using C++/Rust development
Leverage our in-house autonomous tools to manage all development flow, from setting up our development environment to creating git branches and deploying services to production
Be the owner of your domain to ensure code quality, performance, and scalability of our products
Manage and complete tasks using TDD, continuous integration and modern development processes
Coach and mentor other developers and help them elevate their skills while investing in your personal growth
Be working independently but as a part of a strong and collaborative team

own the responsibility for delivering networking features and their verification aspects.
define, develop and maintain verification infrastructure and regression tests suites - make TEST suites robust, maintainable and easy portable.
work with continuous integration system, regression tools, automate builds, run TEST suites and analyzing results.
innovate!

physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.
be exposed and work on a variety of challenging designs (including high cell count and hs blocks). resolving complex timing and congestion problems.
daily work involves all aspects of physical design chip development (rtl2gds) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.
taking part in flows development.

seeking a dynamic and highly motivated senior Software manager to lead our software verification and automation for doca networking sdk. we are looking for a candidate who can excel in a sophisticated, multidisciplinary environment, take ownership, and drive high-quality verification and automation processes. this position offers the opportunity to have a real impact on sophisticated, groundbreaking products, delivered by nvidia and developed by our customers, empowering the most advanced data centers in the world. this role requires close collaboration with teams across various fields (sw, hw, QA ) to elevate our product to the next level.
what you'll be doing:
lead teams of software Verification engineers, providing technical direction, career development, and performance mentorship
define and continuously refine our software testing methodology and processes
engage in a hands-on approach, actively participating in the design, coding, and debugging of verification tests and infrastructure alongside your team
lead the verification process, ensuring the functionality, stability, and performance of our doca networking sdk and the solutions on top of it
work closely with internal and external customers to understand system use cases
analyze coverage measures to identify verification gaps and provide data -driven insights into product development and release readiness