We are looking to hire a Chip Design Engineer (RTL or Verification) to join our R&D team at Kiryat Gat.
Responsibilities:
Daily work involves all aspects of chip development, mainly design and verification.
Work environment is versatile, educational, dynamic and challenging.
Our employees are currently working on innovative, next-generation systems with CPUs, encryption and networking at the forefront of technology in terms of performance and power efficiency.
Work with the best and become one of the best!
Requirements:
B.SC in Computer Engineering /Electrical Engineering/Communication Engineering.
0-2 years of proven experience in RTL Front End Asic Design (Chip Design or verification).
Advantages:
Knowledge in CPUs/u-controllers/multi-core systems/cache coherency.
Knowledge in HDL (Verilog).
Hands on experience in DV in all levels(Specman).