לוח משרות דרושים Layout משרה מלאה, לחיפוש זה נמצאו 11 משרות

As an Analog Layout Automation Engineer, youll convert design concepts into silicon by collaborating with circuit designers and using advanced, including AI-powered, CAD tools to create high-performance analog and mixed-signal layouts. You will review floor plans, analyze circuits, run verification suites, and resolve LVS/DRC/ERC issues to deliver next-generation SOCs. Youll also drive automation by developing scripts, improving workflows, and applying AI/ML for layout optimization, verification acceleration, advanced modeling, intelligent quality metrics, reduced manual effort, and data-driven design insights.

Required Package Design/Layout Engineer
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Our mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
Dive into the architecture and microarchitecture of complex hardware units and features, such as packet processing pipelines and advanced networking capabilities. Develop comprehensive post-silicon validation test plans based on a thorough understanding of the design and specifications.
Write, execute, and debug validation tests using Python or C/C++, running on pre-silicon emulation platforms and primarily on the silicon.
Lead the bring-up, troubleshooting, and debug efforts on silicon, identifying root causes of hardware and software issues. Collaborate closely with architects, designers, and other teams to drive bug fixes and ensure feature functionality.
Contribute to the development of test infrastructure and methodologies to improve validation efficiency and coverage. Mentor and guide junior engineers as the team grows.

Our Analog Layout design team is looking for a Senior Analog Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. We are a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence.

What you'll be doing:

Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools.

You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis.

We have continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our lifes work, to amplify human creativity and intelligence. Make the choice to join us today.

What youll be doing:

Working closely with product design engineers, you'll perform PCB layout of high speed/high-density value-conscious PCBs for all business units in our company (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning, and AI), all using Cadence PCB design tools.

Focus will be on the complete development of CAD layout from symbol creation, floor planning, and detailed component placement, constraints management, with a concept of topology and signal/trace integrity.

You will be responsible for the design releases required generation of artwork files, ODB++, and electronic PCB documentation.

Your designs will need to follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specifications and NRC regulations.

SolarEdge (NASDAQ: SEDG) is a global leader in high-performance smart energy technology, with over 3000 employees, offices in 34 countries, and millions of products installed in over 133 countries. Our diverse product offering comprises intelligent solar inverters, battery storage, backup systems, EV charging, and complete home energy management ecosystems. By leveraging world-class engineering capabilities and with a relentless focus on innovation, we strive to create a world where clean, green energy from the sun is the primary source of power for our homes, businesses, and just about everywhere we thrive. We are looking for an experienced PCB Layout Designer to join our Layout Design team within the SolarEdge Hardware division. The Layout Design team is responsible for the layout of all core Hardware products, including High-Voltage power boards, optimizers, communication circuits, and complex battery management systems (BMS). This is a highly challenging role where you will work in a dynamic, fast-paced environment, handling multiple priority projects under tight schedules while working closely with Hardware, Q&R, and Mechanical engineers. What you will do:
* Design and develop multi-layer PCB layouts from concept to production, including placement, routing, and final manufacturing outputs.
* Translate schematics into optimized layouts considering Signal Integrity (SI), Power Integrity (PI), EMI/EMC mitigation, thermal, and manufacturability constraints.
* Work in a Cadence Allegro and OrCAD Capture environment, including the use of parallel layout tools like Symphony to accelerate delivery.
* Collaborate closely with Mechanical engineers (handling 3D IDF/IDX transfers), R&D teams, and Reliability (Q&R) teams to meet strict mechanical constraints.
* Strictly adhere to our internal "Design Considerations" guidelines and the team's layout "Cookbook" methodologies to ensure standardized execution.

Country:
Israel

City:
Herzliya