דרושים » הנדסה » IC Package Layout Engineer

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חברה חסויה
Location: Jerusalem
Job Type: Full Time
Required IC Package Layout Engineer
About the team:
We develop purpose-built hardware and AI technologies that power advanced driver-assistance and autonomous-driving solutions. Our EyeQ SoCs and imaging radar technologies are designed to deliver scalable, automotive-grade performance and help enable safer mobility worldwide.
Join our advanced packaging team and take ownership of package-substrate layout for cutting-edge digital and RF products. You will collaborate with silicon, package, SI/PI, PCB, manufacturing, and OSAT teams to deliver high-quality, manufacturable package layouts that meet demanding automotive requirements
What will your job look like:
Own IC package-substrate layout from feasibility through manufacturing release.
Perform die placement, bump fan-out, ball-map planning, package-size estimation, and layer planning.
Set up stack-ups, padstacks, design rules, and layout constraints.
Implement high-density bump-to-ball routing for signal, power, and ground nets.
Route high-speed and RF interfaces according to defined SI/PI constraints.
Perform DRC, connectivity, LVS/netlist, and DFM checks.
Generate artwork, fabrication drawings, reports, and release documentation.
Resolve layout-related queries from substrate manufacturers and OSATs.
Requirements:
B.Sc. in Electrical Engineering or a related field, or equivalent practical experience.
5+ years of hands-on IC package-substrate layout experience.
Strong proficiency with Cadence Allegro Package Designer.
Experience with flip-chip BGA, bump fan-out, ball-map optimization, and multilayer substrate routing.
Experience working from schematics, netlists, design rules, and constraint documents.
Good understanding of high-speed layout principles, including differential pairs, length matching, spacing, and return paths.
Good understanding of power-delivery and power-integrity layout principles, including power and ground plane design, current-carrying requirements, and via-array implementation.
Experience with DRC, connectivity verification, DFM, and manufacturing-data release.
Strong attention to detail and the ability to independently own designs through release.
Nice to have:
Experience with RF, SiP, multi-die, interposer, or 2.5D package layouts.
Experience with DDR, PCIe, SerDes, MIPI, or UFS interfaces.
Experience with Siemens Xpedition Package Designer or CAM350.
Experience working directly with substrate manufacturers and OSATs.
Experience with scripting for package-layout automation.
This position is open to all candidates.
 
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חברה חסויה
Job Type: More than one
You will work closely with hardware engineers from schematic design through production, taking ownership of complex
multilayer PCB layouts in a multidisciplinary development environment.

What Youll Do
* Design complex multilayer PCBs (2-10 layers and above) using Cadence Allegro PCB Designer
* Work with OrCAD Capture schematics and implement them accurately in layout
* Define design rules according to electrical, EMC/EMI, and Signal Integrity requirements
* Design routing for high-speed analog and digital signals and communication interfaces
* Work with low and medium voltage designs, including isolation and separation requirements
* Collaborate with the mechanical team for enclosure integration
* Prepare manufacturing files (Gerber, Drill, Stackup, Pick & Place) and support production
* Work with Priority ERP for component database management
Requirements:
* 3-5+ years of PCB layout design experience
* Strong experience with Cadence Allegro PCB Designer
* Experience working with OrCAD Capture
* Experience designing multilayer boards
* Good understanding of Signal Integrity and Power Integrity
* Experience with EMC/EMI standards - significant advantage
* Experience with mixed-signal designs (Analog + Digital) - advantage
* Experience working with PCB manufacturers and assembly processes
* Strong teamwork and communication skills
This position is open to all candidates.
 
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Location: Jerusalem
Job Type: Full Time
Required Integration and Validation Architect
About the team:
Join our hardware systems team to drive DV/PV software readiness for our AV-HW Tier 1 products. Youll combine customer-facing technical leadership, detailed validation design and hands-on integration to secure internal acceptance and customer satisfaction with testability and coverage.
What will your job look like:
Youll lead customer technical reviews, present readiness and validation evidence, and resolve concerns about testability and coverage.
Youll translate customer expectations and system requirements into detailed integration plans, coverage, loads, diagnostics and monitoring requirements.
Youll define interfaces between DV/PV software, SoCs, test hosts, equipment and automation, guiding teams and suppliers through implementation and verification.
Youll bring up test setups, integrate hardware and software releases, and troubleshoot issues using measurements, logs and controlled experiments.
Youll use technical judgment to coordinate investigations and corrective actions across teams, and verify that issues are resolved.
Youll own technical documentation and customer review material, keeping coverage tables, procedures and reports aligned with demonstrated capabilities.
Youll accept or withhold technical readiness against agreed requirements and assess the validation impact of hardware and software changes.
Requirements:
B.Sc. in Electrical Engineering or a related field.
5+ years of experience in hardware systems, embedded software and system integration.
Practical integration and validation experience, strong lab skills, and the ability to turn requirements into testable capabilities.
Hands-on Linux proficiency for accessing and troubleshooting SoCs, test hosts and devices using SSH, serial consoles, logs, configuration and process/service checks, and network diagnostics.
Strong technical English and experience communicating findings and resolving questions with customers and technical partners.
Python and Bash for automation, test execution, diagnostics and data analysis.
Understanding of automotive hardware systems, including SoCs, power and thermal behavior, communication interfaces, embedded diagnostics and validation under environmental stress.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Jerusalem
Job Type: Full Time
Our Autonomous Driving group is looking for a system integration engineer to join our growing team!
You will play a key role in designing and developing AV platforms, and should be comfortable with defining complex system architectures and hands-on bring-up, debug, and prototyping.
The system integration team ensures fast & successful enablement of our AV platforms, from design phase to product launch, while collaborating with internal & external stakeholders. We're looking for a strong, hands-on, System Integration Engineer who is passionately motivated by challenges and excels in troubleshooting complex problems.
What will your job look like?
Accompany the product development from the early design stages (block diagram, schematics, layout, SI/PI/TA simulations), reviewing and approving the hardware design, towards the board bring-up and approval.
Collaborate with multi-discipliner (HW/SW/System) development teams, in order to ensure the product success prior customer delivery.
Responsibility for providing quick and professional analysis and troubleshooting of advanced issues.
Have the opportunity to work on innovation, including initiating and developing tools to enhance the team's work efficiency.
Requirements:
BSc in Electrical Engineering.
4+ years of experience in System Integration including experience with bring-up of complex systems.
Knowledge of Signal integrity, Power integrity & timing analysis simulations
Experience with the following protocols/interfaces - MIPI, PCIe, SPI, I2C, SFI, CAN, UART, DDR
Hands-on working, experience with lab tools - scopes, LA, power supplies. Being able to create test setups and procedures.
Experience with developing scripts using Python - an advantage.
Fluent in English and Hebrew.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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חברה חסויה
Location: Jerusalem
Job Type: Full Time
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!

As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise )
Requirements:
Minimum Qualifications
3+ years of experience in physical design of large-scale SoCs.
B.Sc / M.Sc Electric Engineering / Computer Engineering.
Extensive experience with one of the place & route tools (Synopsys / Cadence).
Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages.

Preferred Qualifications
Knowledge in Verilog - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8876859
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דיווח על תוכן לא הולם או מפלה
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תיאור
שליחה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: Jerusalem
Job Type: Full Time
As a member of our Physical Design group, you will take an integral part in bringing large scale SoCs to life, helping us deliver the next generation of our ground-breaking products.
You will own the physical design cycle at the partition/IP/Chip levels, including netlist to GDS implementation and verification.
Are you ready to join some of the world's leading engineers and work with state of the art design flows and process technology?
If you possess the knowledge and experience in any of the physical design domains and practices with track record of tape-outs in sub-micron technology, come join our group!


As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise ).
Requirements:
Minimum Qualifications
3+ years of experience in physical design of large-scale SoCs.
B.Sc / M.Sc Electric Engineering / Computer Engineering.
Extensive experience with one of the place & route tools (Synopsys / Cadence).
Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages.

Preferred Qualifications
Knowledge in Verilog - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8876890
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
Required Validation Engineer & Embedded System Integration
About the team:
The Product Validation department is looking for a Validation Engineer.
Our department is responsible for delivering high-quality ADAS (Advanced Driver Assistance Systems) products.
We are the first line of support for our customers around the globe, and as our Validation Engineer, you will interact with most of our departments to achieve our goals.
What will your job look like:
Perform system-level validation of embedded systems, covering both hardware and software, with a strong focus on functional testing
Design and maintain test environments, including lab setups, test systems, and configurations.
Write and execute test plans and test cases based on system requirements, including manual and automated tests.
Conduct hands-on debugging and integration of hardware and software systems in a laboratory environment.
Validate communication protocols and system interfaces, and perform hardware bring-up and integration testing.
Install and support debug systems and sensors on development vehicles and assist automotive customers during integration.
Requirements:
B.Sc. in Electrical Engineering, Mechanical Engineering, or Communications Systems Engineering (or an equivalent field).
2-5 years of experience in integration or validation.
Proven experience with embedded systems testing.
Hands-on experience with CI tools, such as Jenkins.
Hands-on experience with Linux-based systems.
Working knowledge of Python, including experience debugging Python code.
Experience with networking \ communication interfaces and protocols.
Experience in test infrastructures, lab environments, and test setups.
Strong analytical, debugging, and problem-solving skills.
Strong teamwork abilities and excellent interpersonal communication skills.
Familiarity with defect tracking and validation tools (e.g., Jira) -an advantage.
Fluent in English and Hebrew.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8896174
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time and Temporary
Required Validation Engineer & Embedded System Integration (Temporary Position - Maternity Leave)
About the team:
The Product Validation department is looking for a Validation Engineer.
Our department is responsible for delivering high-quality ADAS (Advanced Driver Assistance Systems) products.
We are the first line of support for our customers around the globe, and as our Validation Engineer, you will interact with most of our departments to achieve our goals.
What will your job look like:
Perform system-level validation of embedded systems, covering both hardware and software, with a strong focus on functional testing
Design and maintain test environments, including lab setups, test systems, and configurations.
Write and execute test plans and test cases based on system requirements, including manual and automated tests.
Conduct hands-on debugging and integration of hardware and software systems in a laboratory environment.
Validate communication protocols and system interfaces, and perform hardware bring-up and integration testing.
Install and support debug systems and sensors on development vehicles and assist automotive customers during integration.
Requirements:
B.Sc. in Electrical Engineering, Mechanical Engineering, or Communications Systems Engineering (or an equivalent field).
2-5 years of experience in integration or validation.
Proven experience with embedded systems testing.
Hands-on experience with CI tools, such as Jenkins.
Hands-on experience with Linux-based systems.
Working knowledge of Python, including experience debugging Python code.
Experience with networking \ communication interfaces and protocols.
Experience in test infrastructures, lab environments, and test setups.
Strong analytical, debugging, and problem-solving skills.
Strong teamwork abilities and excellent interpersonal communication skills.
Familiarity with defect tracking and validation tools (e.g., Jira) -an advantage.
Fluent in English and Hebrew.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8896182
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
לפני 3 שעות
חברה חסויה
Location: Jerusalem
Job Type: Full Time
As a member of our Physical Design team in this highly visible role, you will directly own implementation and verification of design partition(s) / IPs (netlist to delivery of our final GDS) for a highly complex SoC utilizing state of the art process technology.
* Implementation - Block level PnR, floor-planning, clock, power planning and distribution.
* Verification and Analysis - Static Timing closure using commercial tools, Physical Verification as well as Electrical/Power Analysis (EM / IR-Drop / Xtalk / noise ).
Requirements:
Minimum Qualifications
3+ years of experience in physical design of large-scale SoCs.
B.Sc / M.Sc Electric Engineering / Computer Engineering.
Extensive experience with one of the place & route tools (Synopsys / Cadence).
Scripting and Programming experience using either TCL or Python or Perl, or known Shell scripting languages.

Preferred Qualifications
Knowledge in Verilog - advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8897474
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דיווח על תוכן לא הולם או מפלה
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
חברה חסויה
Location: More than one
Job Type: Full Time
As a manager in the RTL/FE CAD team, you have the opportunity to shape the future of chip design and impact our engineers who develop the next generation of our products! You will lead a high-impact team that develops software solutions used by thousands of RTL design and integration engineers globally across all chip families (iPhone, iPad, Mac, Apple Watch, and more).
In this role, you will be a key catalyst in transforming front-end hardware design into a modern, agile discipline. You will spearhead the transition to agentic workflows-redefining how RTL and integration teams operate in the AI era. This role combines deep knowledge of RTL/FE flows with modern software engineering practices, people leadership, and a transformative vision for engineering methodology.

Responsibilities
People Leadership: Lead, mentor, and grow a team of ~20 CAD engineers, driving talent acquisition, technical mentorship, performance management, and career development.
Agentic Flow & Methodology Transformation: Drive the team and broader RTL/FE community toward agentic workflows. Act as an organizational change agent, pioneering modern, agile methodologies that transform daily design and integration practices.
LLM Harness & Agentic Tooling: Own the architecture and execution of the LLM harness for RTL/FE flows (e.g., autonomous violation triage for Lint/CDC/RDC, intelligent connectivity synthesis, and design assist agents). Establish rigorous benchmarks to continually evaluate and elevate workflow accuracy and autonomy.
RTL Integration & Connectivity Tooling: Own end-to-end RTL integration tools, including connectivity generation, SoC assembly automation, IP packaging, and structural checks.
Static Sign-off Checks: Drive methodology, deployment, waiver governance, and sign-off metrics for Lint, CDC, RDC, and related static verification domains.
Roadmap & Milestone Alignment: Define strategic roadmaps and near-term execution plans aligned with multi-project tapeout milestones and long-term organizational goals.
Stakeholder & EDA Vendor Partnership: Collaborate closely with RTL design and integration leads to turn evolving design challenges into robust software solutions. Partner with EDA vendors to resolve escalations and influence tool roadmaps.
Software Excellence: Champion software engineering best practices, modern Python development, scalable cloud architectures, and robust CI/CD infrastructure within CAD.
Requirements:
Minimum Qualifications
7+ years of experience as a people manager leading engineering teams.
BSc/MSc in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
Proven track record in RTL design, design integration, or RTL/FE CAD across complex SoC projects.
Strong software engineering foundation, including system architecture, algorithms, data structures, and modern software design principles.
Demonstrated experience driving workflow automation, process modernization, or agile transformation within hardware/CAD environments.
Outstanding communication, collaboration, and stakeholder management skills with the ability to influence cross-functional technical direction.
Solid grasp of the front-end chip design flow: SystemVerilog/Verilog, RTL integration, static checks (Lint, CDC, RDC), synthesis, and simulation.

Preferred Qualifications
Prior expertise designing, deploying, or evaluating agentic workflows, LLM harnesses, or AI-assisted development tools in hardware design or software engineering.
Experience pioneering agile methodologies in silicon design (e.g., continuous integration for hardware, rapid iteration cycles, automated regressions).
Hands-on experience with production RTL connectivity tools and SoC top-level assembly flows.
Strong modern Python expertise (AsyncIO, FastAPI, Pydantic, SQLAlchemy) and experience building distributed, cloud-native backend services.
Proven success managing relationships with major EDA vendors and driving large-scale tool adoption.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8892424
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Jerusalem
Job Type: Full Time
We are looking for a Semiconductor Quality & Reliability (Q&R) Engineer with experience in yield analysis and semiconductor device physics. The role focuses on analyzing silicon data, identifying yield and reliability issues, and supporting root-cause investigations and continuous improvement.
What will your job look like:
Perform semiconductor yield analysis and identify yield-loss mechanisms, parametric trends, and outliers.
Analyze test, wafer, and silicon data to support quality and reliability investigations.
Apply device physics knowledge to understand electrical behavior, process variation, and potential failure mechanisms.
Support root-cause analysis and corrective actions for yield and reliability issues.
Collaborate with design, product, test, process, and manufacturing teams to improve product quality and yield.
Prepare technical analyses, reports, and recommendations based on silicon data.
Requirements:
Bachelors or Masters degree in Electrical Engineering, Physics, Materials Science, Semiconductor Engineering, or a related field.
~5 years of relevant experience in semiconductor quality, reliability, yield engineering, product engineering, process engineering, or device technology.
Solid understanding of semiconductor device physics.
Hands-on experience with yield analysis, statistical data analysis, and silicon-data interpretation.
Experience investigating parametric variation, yield excursions, and reliability-related issues.
Strong analytical, problem-solving, and communication skills.
Communicative with internal teams and external semiconductor manufacturers and OSATs.
Excellent documentation and language skills (English).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8895973
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