we're seeking a visionary ASIC Design Student to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, designing complex solutions that sit at the heart of our most ambitious connectivity projects.
As an ASIC Design Student, you won't just build chips-you will be part of a team defining the next generation of AI infrastructure main components. The complex digital blocks under your micro-architecture and implementation responsibilities will power the world's largest AI clusters. You will own the journey from high-level definition through RTL implementation and backend support, transforming complex logic challenges into elegant, high-performance hardware. If you thrive on solving unnamed challenges in deep-submicron processes and want to shape the digital design foundation for AI infrastructure connectivity, this is your opportunity.
Key Responsibilities
Assist in the development of micro-architecture, RTL coding, and debugging for complex digital blocks
Utilize industry-leading EDA tools (Lint, CDC, Synthesis) to ensure designs are robust and power-efficient
Work closely with the verification team to run simulations, analyze results, and ensure design quality
Interact with Architecture and Backend teams to understand the full chip development lifecycle
Help leverage AI-based automation tools to optimize engineering workflows
Requirements: Pursuing a Bachelors or Masters degree in Electrical Engineering, Computer Engineering, or a related technical field
Strong academic record with a focus on Digital Logic Design and VLSI
Ability to work at least 2 days per week at our Haifa/Tel Aviv center
Solid understanding of logic design principles and hardware description languages (Verilog or SystemVerilog)
A "can-do" attitude with a passion for solving complex technical challenges
Fluent in Hebrew and English with the ability to work effectively in a team environment
This position is open to all candidates.