we are seeking best-in-class asic Verification engineers to help deliver the worlds leading cpu's and SOC 's. this position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. we are a learning machine that constantly evolves by adapting to new opportunities that are hard to pursue, that only we can take on, and that matter to the world. we have crafted a team of excellent people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
we are building a new group in israel, this group delivers security engines and risc-v processor ips to all of product lines working with all groups around the world. we are looking for inquisitive, motivated engineers with experience to continue to build this new group. as a senior member of our team, you will be responsible for the verification of high-performance, low-power security engines and risc-v processor modules. you will work closely with architects, design engineers, fc Verification engineers, and sw teams.
Requirements: participate in micro-architecture development and document specifications.
build system verilog uvm verification environments for ips in areas of crypto and risc-v platforms.
build verification and TEST plans to get to complete coverage.
work with the designers in our team to debug and clean all bugs
deliver the ips to higher level verification like cluster, fc and emulation.
what we need to see:
a bachelors degree in electrical engineering or computer engineering
5+ years of relevant experience in verification of complex designs.
proficient in system -verilog and uvm methodology.
good interpersonal skills. and team player.
ways to stand out from the crowd:
background with crypto rtl units (aes, rsa, pqc)
experience working on risc-v or risc-v peripherals
experience working in a diverse and global environment (working with engineers from china, india, and the us).
This position is open to all candidates.