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Required Senior SoC Product Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Develop and implement strategies for high volume manufacturing of SoC products, including troubleshooting, ATE test coverage optimization, DPPM reduction, test cost reduction, power and performance assurance, and product data integration and correlation between system, ATE, and SLT.
Drive interactions with wafer fab and OSATs, own and drive checkpoints for key quality metrics.
Drive volume ramp and mass production through test program releases, volume data analytics, lot disposition, extended test time reduction, yield improvement, and RMA handling.
Support setup and maintenance of test, diagnosis, and yield analysis infrastructure, including Return Merchandise Authorization (RMA) support.
Collaborate with cross functional teams across the globe including ATE and SLT Test Engineering, Quality and Reliability (Q&R), Packaging, Supplier Management and Operations to build, deploy, and maintain a high volume manufacturing screening solution.

We are seeking a talented Program Manager to join our team. In this high-visibility, hands-on role, you will drive forward the development of our chip by managing the complete program lifecycle, from architecture to successful tapeout, ensuring deliverables meet scope, schedule, and quality requirements.

Responsibilities
Lead the planning, development and implementation process of cross-functional teams focused on product delivery.
Drive the execution of the hardware roadmap by managing the complete lifecycle from architecture definition to tapeout.
Partnering tightly with Architecture, RTL Design, and Design Verification (DV) leads to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule.
Define the core operational processes and modes of work for the entire HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification.
Oversee project monitoring, reporting, and risk management, from initiation to delivery, addressing intergroup dependencies to ensure timely and successful completion.
Lead process and methodology improvements, proactively addressing issues to achieve business goals.

As a Signal & Power Integrity Engineer on the Nitro team, you'll work on next-generation cloud infrastructure hardware while developing your skills in Signal Integrity and Power Integrity. This is an opportunity to learn SI/PI analysis and simulation while applying your hardware design knowledge to solve complex challenges in high-speed digital systems. You'll be mentored by experienced engineers and contribute to products that directly impact our customers.

Key job responsibilities
- Design and debug high-speed digital circuits for K2 cards and server platforms.
- Learn and apply SI/PI simulation methodologies for PCB and system-level designs.
- Collaborate with Package design, SerDes and DRAM IP provider, firmware, EC2, and manufacturing teams.
- Perform signal integrity analysis for high-speed interfaces and SerDes channels at the advanced of the technology.
- Analyze and optimize power delivery networks from card to system level.
- Support hardware bring-up, debug, and validation with hands-on lab work.
- Participate in design reviews and provide technical feedback with internal and external design teams.
- Work with cross-functional teams to resolve signal quality and power integrity issues.
- Contribute to design guidelines and best practices based on measurements and analysis.

Required Senior Design Engineer, Edge AI, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, youll work to shape the future of an Edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability are mission-critical.
Youll be part of a team that pushes boundaries, developing robust, autonomous solutions that define the next generation of intelligent infrastructure and hardware for the edge. You'll contribute to the innovation behind products that transform industries, leveraging your expertise in system-level integration and localized processing to deploy complex AI models across sophisticated hardware platforms, ensuring intelligence is embedded exactly where the action happens.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Lead a complex ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement groundbreaking data center.
Define high-performance hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.

We are seeking a highly motivated and experienced System Engineer to join our team and lead the development of sophisticated solutions that push the boundaries of flight

responsibilities:

Lead the development of innovative and complex airborne systems
Develop system requirements that meet customer requirements and product definitions provided by other departments
Facilitate PMO on developing integration plans identifying timelines, resources and equipment requirements to integrate engineering designs into higher level products
Define and lead system level test plans to validate that the engineering designs meet requirements
Collaborate with the R&D and Line of Business managers to ensure timely project delivery
Work as an integral part of the Engineering team in the development of new products and supporting existing products
Define and lead experiments, tests and studies, and/or analytical investigations and provide clear and meaningful results and analysis
Compile and assist in the presentation of test data collected during design validations to a peer group of engineers
Work in collaboration with a multi-disciplined engineering team to develop engineering designs/solutions from initial POC to onsite customer implementations
Contribute to documentation for use in the manufacture, installation, technical support and training related to the final design
Support engineering products through entire life cycle including; assist in installation at customer site, assist in product upgrades and improvements, support of service escalations and product EOL
Oversee technical management of sub-contractors

Our Professional Services is seeking an Experienced system Engineer We are seeking an Experienced system Engineer to join our team and drive the development of diverse, cutting-edge UAV systems.
If you are looking for a meaningful technological journey filled with multidisciplinary challenges, come and be a part of our story. Key Responsibilities:
* End-to-end development of software- and hardware-intensive UAV systems, from solution definition through technical requirements authoring, integration, testing, and customer delivery.
* Leading complex integration processes, including the integration of products, payloads, and airborne subsystems.
* Defining system -level requirements for various components and authoring detailed specifications and technical documentation.
* Leading cross-functional development and integration efforts across diverse engineering teams, including Airborne Software, C2 (Command & Control) Software, Simulators, QA /Testing, Electronics, and more.

We are looking for a junior Embedded Software Engineer, to join us in building the next generation of networking products. Youll have the opportunity to work on the technologies that power the worlds largest cloud provider, in a dynamic, open, fast-paced environment. Working for Annapurna Labs is thrilling and a constant learning experience. As an embedded SW development engineer, you will be responsible for developing features for Annapurna Labs next-generation hardware, to enable high network bandwidth and packets-per-seconds (PPS) performance, with consistently low latency. You will work to bring up a broad selection of instance types, optimized for various use cases, to suit each of our customers needs, such as varying combinations of CPU, memory, storage, and networking capabilities. As a SW development engineer, you will play a key role in shaping architecture definitions and SW system designs, and help to resolve complex customer issues. You will continuously evolve technically, while working to monitor AWS cloud health, maintain high quality standards, develop highly-optimized code, and provide exceptional customer satisfaction.

Key job responsibilities
We will be conducting a unique onboarding training program, where you will be studying the following with our technical experts and team leaders:
* Embedded systems basics.
* Annapurna technologies in EC2.
* Cloud compute development.
* Networking 101.

Join an agile team working on the most advanced wireless communication solutions, focused on the latest communication standards. You will define the architecture for future products and optimize modem solutions for hardware implementation.

Responsibilities:

Research and define architecture for advanced communication standards.

Define PHY System specifications and architecture for future solutions.

Define low-power architecture.

Work closely with the functional teams (Algorithm, HW/SW, RF, Validation, etc.), from early algorithm study to system validation.

Participate in integration and testing of wireless system solutions, spanning embedded SW, HW and radio.

Support customers engagement and product deployment.

Appdome's mission is to protect every mobile app in the world and the people who use them. We are the leader in AI-native mobile business protection, providing cyber and fraud teams with an agentic platform that builds, monitors, and maintains security defenses in Android and iOS apps — with no SDKs, no coding, and no disruption to engineering cycles.
Our platform delivers over 400 security, anti-fraud, anti-bot, and API protection capabilities, powered by deep learning models trained on a decade of mobile defense data and trillions of live threat events. From build time to runtime, Appdome's AI Agents help mobile brands detect, investigate, and respond to threats faster than ever — recognized as the best AI Platform for Cyber Resilience at RSA Conference 2026 for the second consecutive year. Leading financial, healthcare, m-commerce, and B2B brands rely on Appdome to secure over 50,000 mobile apps and protect more than 1 billion end users globally.
Appdome is an Equal Opportunity Employer. We are committed to diversity, equity, and inclusion in our workplace. We do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, veteran status, or any other characteristic protected by law. All qualified applicants will receive consideration for employment without regard to any of these characteristics.
About the Role We are looking for a talented Software Engineer to join Appdome's Identity Group. You will take part in building advanced fraud detection capabilities, working closely with security researchers and data teams to develop cutting-edge solutions that protect hundreds of millions of mobile devices.
Responsibilities
* Design and develop core components of fraud detection systems from early prototyping through production-ready releases.
* Build scalable backend services and distributed systems that process data at scale.
* Work with large-scale datasets and collaborate with data teams to create actionable signals and features.
* Write high-performance, production-quality code in C and C++ optimized for reliability and performance.
* Take ideas from rapid proof-of-concept through to production, tackling complex engineering challenges across the full development lifecycle.

We are now looking for a Power Optimization and Analysis Engineer! We prides ourselves on having energy-efficient products. We believe that continuing to maintain our products' energy-efficiency compared to competition is key to our continued success. As part of the u/arch team in the Switch group, you will be responsible for analyzing full chip and unit-level power data and driving the FE/BE ASIC teams to improve their units power efficiency; you will be responsible for researching, developing, and deploying methodologies to help our products become more energy efficient. Key responsibilities include developing techniques to model, analyze, and reduce power consumption of our Switches product line.

As a member of Switch u/arch Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study and implement power analysis and reduction techniques for our next generation switches. Your contributions will help us gain early insight into energy consumption of graphics and artificial intelligence workloads, and will allow us to influence architectural, design, and power management improvements.

What You'll Be Doing:

Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.

Develop and share best practices for performing pre-silicon power analysis.

Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.

Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.

Select and run a wide variety of workloads for power analysis.

Prototype new architectural features in Verilog and power analysis.

Were looking for an Experienced Physical Design Engineer to join our growing team, and take a key role in developing our next-generation SoC from definition to Tape-Out.
What will your job look like:
Hands-on physical design block owner, leading the process from RTL to GDS .
Lead floorplan exploration in collaboration with Front-End and Architecture teams.
STA: Partner with FE and floor planners to manage block and top-level constraints and perform 1st-level timing analysis.
Synthesis: Conduct synthesis exploration and deliver final netlists, including scan insertion, UPF, and clean Lint/Spyglass checks.
Place & Route: Drive the flow from synthesis netlist to final layout and signoff verification, with a focus on optimizing PPA (Power, Performance, and Area).
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification.

We are looking for a talented Process Electronics Engineer to join our Engineering team and lead the transition of innovative electronic products from development to production.

What youll do:
Lead New Product Introduction (NPI) and transfer products from R&D to manufacturing.
Develop, optimize, and improve manufacturing processes for electronic and electromechanical products.
Drive Design for Manufacturing (DFM), Design for Assembly (DFA), and Design for Testability (DFT) activities.
Investigate production issues, perform root cause analysis, and implement corrective actions.
Lead process validation, qualification, automation, tooling, and continuous improvement projects.
Collaborate closely with R&D, Production, Quality, Supply Chain, and Manufacturing teams.

We're looking for an exceptional senior Chip Design Engineer to join our Nitro team and help shape what comes next. You'll work alongside a world-class, fast-moving engineering team, take full ownership of critical IP blocks, and see your work deployed at a scale no other platform can match- powering hundreds of thousands of businesses across 190 countries.

As a Senior Chip Design Engineer on the Nitro team, you will take full end-to-end ownership of one or more critical IP blocks within the product, guiding them from micro-architecture definition through RTL design, debug, synthesis, timing closure, and final sign-off before tape-out. Your work will ship in silicon that powers us at global scale.
You'll partner closely with the Verification and Emulation teams to shape test plans, review coverage, and close gaps early in the design cycle. Beyond your own IP, you'll collaborate across disciplines with Product Definition, Software, Physical Design, and Verification teams to deliver a fully integrated, production-ready chip.

Key job responsibilities
* Full ownership of one or more IPs within the product:
Micro-architecture definition.
RTL coding and debug.
Synthesis and timing closure.
Sign-off before tape-out.
* Supporting the Verification and Emulation teams: Test plan development, coverage review.
* Ensuring the chip meets quality and reliability standards.
* Collaborating with cross-functional teams, including Product Definition, Verification, Software, and Physical Design.

The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you'll be doing:

Designing and implementing SOC level clock requirements.

Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks.

Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

We are looking for a Senior verification engineer to join our FullChip Switch Silicon team. As a FullChip verification engineer in our Networking business unit, you'll join a group of passionate and talented engineers to design and implement the next generation state-of-the-art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a Full Chip verification team that is responsible to integrate and verify our Switch products at system level.

Work closely with multiple teams within organizations such as Architecture, u-arch, Firmware and all units inside the switch.

Responsible to drive the FullChip verification execution, including staging plan of the projects and deliveries.