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24/09/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
As we expand our presence in Israel, we're seeking a highly skilled Static Timing Analysis (STA) Engineer to join our local engineering powerhouse from the ground up.

This is a unique opportunity to take on meaningful technical ownership in a new site, executing the sign-off methodology for chips that power the world's most advanced AI clusters. As an STA Engineer, you will be deeply involved in the STA activities from chip partition and time budgeting through to final sign-off. You will bridge the gap between Architecture, Design, DFT, and Physical Design to ensure our high-performance silicon meets the aggressive timing targets required for next-generation connectivity.


Key Responsibilities
Execute the STA flow and sign-off methodologies, ensuring our products meet rigorous timing criteria for the most demanding data center environments.
Collaborate closely with Architecture, Design, DFT, and Backend teams, participating in timing reviews and working with block owners to navigate the path to sign-off convergence.
Develop, optimize, and manage complex SDC constraints, ensuring they are accurate and robust across multi-scenario environments.
Analyze and resolve challenges related to cross-chip clock distribution networks and apply sophisticated margining techniques to ensure robust silicon across all process corners.
Participate in design methodology improvements and tool automation, utilizing both industry-standard EDA tools and custom scripts to make our sign-off process faster and more efficient.
Requirements:
Basic Qualifications
B.Sc. in Electrical Engineering or Computer Engineering.
6+ years of hands-on experience in Static Timing Analysis (STA) at semiconductor companies, specifically working on advanced process technologies. (Note: Adjust years of experience based on the exact level you are targeting).
Deep expertise in multi-scenario STA, as well as timing and SDC constraint development and verification at the block and subsystem levels.
Solid understanding of advanced margining methodologies, including OCV, AOCV, and POCV, from synthesis through to final sign-off.
Solid knowledge of physical design flows (Synthesis, P&R, Physical Verification) and how they intersect with timing closure.


Preferred Experience
Experience developing and validating constraints using industry-standard tools like Timing Constraints Manager (Synopsys) or TimeVision (Ausdia).
Proven track record of executing STA on complex Macro-level designs and supporting Full-Chip timing integration.
Strong background in scripting (Tcl, Python, Perl) and automation to enhance timing closure efficiency.
This position is open to all candidates.
 
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Location: Caesarea
Job Type: Full Time
As SIPI engineer youll be required to design and analyze high speed analog/digital signals for networking products, with emphasis on high speed signal and power analysis of ASIC, Package and PCB. Model/simulate/characterize high speed systems, including high speed I/Os, chip packages, printed circuit boards, and system interconnects. Overcome the challenges of ultra-high data rate and cutting-edge technology. We use the latest silicon technologies and processes to build largest scale and most complex devices at the edge of feasibility.
Requirements:
Minimum Qualifications

B.Sc or M.Sc Electrical Engineer graduate from leading Israeli Universities with average grades above 85.

Physics background.

Brilliant ambitious and motivated individual, regardless of previous experience.

Team players who enjoy big challenges.

People who can quickly ramp on multiple, interdisciplinary domains.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8837072
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Signal/Power Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities:
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Collaborate extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers, to define specifications and resolve integration challenges.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR) , Spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish robust design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Requirements:
Minimum qualifications:
PhD degree in Electrical Engineering, Computer Engineering, Physics, Materials Engineering, or Computer Science.
Relevant practical or internship experience, or personal project experience in hardware or electrical engineering.
Preferred qualifications:
Working knowledge of physical layer requirements for PCIe, Ethernet (IEEE 802.3).
Advanced proficiency in Python (NumPy, Pandas) for data analysis and instrument control.
Ability to correlate lab measurements with pre-silicon SI simulations (HSPICE, ADS, or Sigrity).
This position is open to all candidates.
 
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04/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
At our company, what you do matters. Every day, we protect over 100,000 organizations worldwide from increasingly sophisticated cyber and AI-driven threats, securing their AI transformation.
Our prevention-first approach safeguards hybrid networks, cloud environments, digital workspaces, and AI systems, stopping attacks before they happen.
This is where innovation meets real-world impact. Youll help customers across industries operate with confidence in a rapidly changing digital world, working alongside smart, curious people who take ownership, challenge assumptions, and solve complex problems.
Were proud to be recognized by TIME, Newsweek, and Forbes for excellence and workplace culture.
What really sets our company apart is the opportunity to grow, contribute, and help companies navigate their AI transformation securely.
If youre excited to work at the forefront of AI-driven security on a global scale, this is the place to do it.
Key Responsibilities
We are seeking a talented and driven Hardware Project Manager to join our innovative team. In this key role, you will lead the development of groundbreaking hardware projects, guiding them from concept to mass production while navigating the dynamic landscape of technology and cybersecurity.
At our company, we value creativity and collaboration, and we are committed to fostering an environment where your ideas can thrive. As part of a global leader in cybersecurity, you will play a vital role in shaping the future of our products and services.
Join us in our mission to secure the future!
Lead developing new hardware projects, ensuring timely progression from concept to mass production.
Manage strategic relationships with customers, ensuring their needs are met throughout the project lifecycle.
Define project requirements and specifications (Design/SRS) for new initiatives.
Coordinate prototype hardware builds (EVT, DVT, PVT) in collaboration with our contract manufacturer.
Manage software release processes, drawing on proven experience in software project management.
Develop and maintain project schedules, identifying critical paths and addressing bottlenecks to ensure smooth execution.
Collaborate on engineering deliverables, including specifications, test plans, reliability testing, and engineering validation.
Conduct audits and manage quality control for production carried out by ODMs.
Communicate the impact of scope changes to all stakeholders, including customers, regarding cost, timing, and quality implications.
Provide regular updates on program statuses, highlighting potential risks and setbacks, and developing mitigation strategies.
Offer basic debugging support for hardware issues.
Collaborate with customers and partners to address field issues and technical inquiries.
Requirements:
Bachelor of Science in Electrical Engineering
Knowledge of hardware design techniques and hardware schematic principles
Experience in board design (At least 2 years) and evaluation of HW vendors
At least 2 years experience in managing Hardware projects
Experience in SW engineering and project management
Excellent communication, organizational, and leadership skills
Self-motivated and proactive with demonstrated creative and critical thinking skills
Detailed knowledge and understanding of product development processes
Strong engineering/technical background/Hands-on approach
Experienced in various project planning tools such as Jira and MS Project
Self-motivated, able to accept new challenges and motivate others
Advantages:
PMP Certification
Background in network protocols
Background in embedded systems
Knowledge of C/C++ language programming for embedded systems
Knowledge of cloud services, cyber security and computer networking
Management of overseas sub-contractors experience
Knowledge in production and manufacturing.
This position is open to all candidates.
 
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8841098
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Location: Caesarea
Job Type: Full Time
Lead hands-on lab debugging to fix complex silicon performance, characterization, and yield issues. Use bench findings and board-probing data to give feedback directly to the architecture and design teams. Lead ASIC bring-up on validation boards, focusing heavily on SerDes, high-speed interfaces, and power/clock domains. Run characterization across PVT (Process, Voltage, Temperature) conditions and analyse large datasets to resolve performance bottlenecks and improve chip yield. Write and optimize clean Python code to automate lab equipment and test internal chip logic. Serve as the technical lead for complex hardware debug, defining validation methodologies, and advanced lab measurement techniques for the team.
Requirements:
B.Sc. in Electrical or Computer Engineering.
6+ years of experience in post-silicon validation, characterization, or hardware testing.
Experience testing and measuring boards using scopes, VNAs, TDRs, and phase noise analysers.
Experienced in bringing up ASICs on EVBs, specifically with SerDes and DC/DC channels.
Ability to write automated scripts for hardware testing and data analysis.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8837137
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Technical Program Manager, Silicon Design Services and Strategic Extended Workforce
About the job
A problem isnt truly solved until its solved for all. Thats why we build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager, youll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. Youll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.
Behind all of our user-facing AI models, applications, and cloud services is an advanced data center infrastructure powered by custom silicon designed by us.
As the Lead Technical Program Manager for Silicon Design Services and Strategic Extended Workforce, you will drive the end-to-end technical engagement, program management, and operational execution of our multi-vendor design services ecosystem. You will lead cross-functional programs spanning external partner selection (RFI/RFP), technical scoping, Statement of Work (SOW) drafting, and day-to-day execution across multiple development functions such as: Physical Design, Design for Test, Verification, and Silicon Engineering (SiEng/NPI). You will serve as the critical technical bridge between our internal silicon design/architecture teams and external design partners, ensuring execution velocity, first-pass silicon quality, IP security, and commercial alignment.
Responsibilities
Lead end-to-end program lifecycles for external design services from scoping, RFP, and SOW finalization through tapeout and production ramp.
Establish multi-tiered vendor governance frameworks and drive critical technical, budgetary, and schedule tradeoff discussions between internal and external leadership.
Partner with our execution owners and vendors to align milestone deliverables, sign-off criteria, and dependency tracking for advanced node SoCs.
Deploy secure Cloud CAD development environments and manage outsourced silicon NPI, including ATE test development and OSAT manufacturing handoffs.
Define Key Performance Indicators (KPIs) and Service-Level Agreements (SLAs) to track milestone adherence, pro-actively mitigate critical-path program risks, and govern strategic commercial agreement terms.
Requirements:
Minimum qualifications:
Bachelor's degree in a technical field, or equivalent practical experience.
8 years of experience in technical program management, project management, or silicon engineering leadership.
Experience with the modern ASIC/SoC development lifecycle, including RTL design, verification (UVM/VIP), physical design (P&R/STA), DFT, and packaging.
Experience managing external design service vendors, ASIC vendors, EDA vendors, or extended workforce engineering teams.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Industrial Engineering, Architecture, Construction Management or related technical fields.
Experience managing 2 full SoC design cycles from early architecture/concept through tapeout to post-silicon bring-up/production.
This position is open to all candidates.
 
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Location: Hod Hasharon and Haifa
Job Type: Full Time
We are looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc.
The minimal tasks of this role are:
1. Modeling of new memory related architectural features in the existing CPU performance simulator
2. Development of performance tests or adaptation of existing workloads to be suitable for simulation
3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip
4. Develop analysis, conclusions and recommendations based on the above activities
The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains
If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, youre welcome on board!
Requirements:
Four or more years of experience in one or more of the following roles in the memory cluster of an Out of Order CPUs:
Architecture or micro-architecture definition.
Performance modeling and studies.
RTL implementation.
Verification of Multithreading.
Education: Academic degree in Computer Engineering or Computer Science
Advantages:
Knowledge and experience in memory ordering architecture.
HW or SW Experience in inter-thread synchronization.
Knowledge of the arm Instruction Set Architecture.
Skills:
Good verbal English skills.
Good interpersonal skills
Team player.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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06/10/2026
Location: Ness Ziona
Job Type: Full Time
We are a growing deep-tech company developing advanced connectivity and electronics manufacturing solutions for next-generation hardware markets. Building on our proprietary Additively Manufactured Electronics (AME) technology, we develop materials, manufacturing processes, and production platforms for high-performance interconnects, electronic substrates, and densely packed three-dimensional structures. This enables highly integrated solutions for demanding applications. We deliver high-density, thermally optimized RF connectivity and high-speed electronics for quantum computing infrastructure, dilution cryostats, and other cryogenic systems. We also advance AME applications for defense, aerospace, missiles, space, and other mission-critical programs worldwide.
Position Overview:
We are looking for a talented RF / Microwave Engineer to shape the future of our quantum signal processing infrastructure. You will be responsible for designing and simulating high-frequency components, developing cryogenic RF signal chains, and correlating electromagnetic models with physical measurements in dilution refrigerators. Working closely with a multidisciplinary team, you will bridge the gap between theoretical microwave design and hands-on system characterization in quantum environments.
Responsibilities Design and simulate RF /microwave components and subsystems across the qubit control and readout signal chain, from concept through validation
 
* Develop and validate cryogenic RF signal chains, including attenuation and filtering budgets, thermal anchoring, and noise management from 300 K to the mixing chamber.
 
* Design controlled-impedance RF PCBs, interconnect transitions, and shielding/grounding solutions
 
* Perform microwave measurements (VNA S-parameters, calibration, de-embedding) and correlate results against EM simulation
 
* Build automation and data -analysis tooling for simulation sweeps and measurement workflows
 
* Support system bring-up, debug, and characterization in dilution refrigerators
 
* Collaborate with multi-disciplinary team members to define and flow down requirements
Requirements:
BSc in Electrical Engineering, Applied Physics, or a related field with 5+ years of industry experience in RF /microwave design. or an MSc/PhD in a related field (fresh graduates without industry experience are welcome).
* Experience with 3D EM simulation tools (HFSS, CST, or COMSOL)
* Experience with microwave measurements using a VNA (S-parameter characterization, calibration, de-embedding)
* Experience in RF PCB design and/or shielding and grounding techniques Preferred
* Cryogenic measurement experience (dilution refrigerator wiring, thermal anchoring, attenuation/filtering budgets)
* Design experience with passive and/or active microwave devices: filters, couplers, hybrids, matching networks, and amplifiers
* Background in superconductivity or superconducting devices
* Familiarity with microwave components in the qubit signal chain
* Scripting for automation and data analysis ( Python, MATLAB)
* Experience or knowledge of 3D printing technologies for RF /microwave hardware
This position is open to all candidates.
 
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Location: Yokne`am
Job Type: Full Time
Required Hardware Engineer
Job Description:
We design complete motion solutions from start to finish. It creates single and multi-axis motion systems that best suit the needs of the customer. Our Piezo-electric motors are compact and efficient, offer extremely accurate and precise movement and high resolution, coupled with dynamic range of velocity and force.
Our solutions are multidiscipline comprising of Mechanical, Electronical and software design and the motion is monitored by control system design.
Job Description:
As a HW engineer you will develop, sustain, and improve our products. Each project goes through methodical process, starting with requirements, kick-off, SDR, PDR, CDR and eventually bring-up, debug and thorough tests to approve every feature/capability according to the requirements.
Part of your duty is to back your design with proper documentation that concludes your work and allows the project to be sustainable, understandable, and accessible to other.
Requirements:
At least 5 years board design experience
Knowledge in Altium designer - advantage
Knowledge in communication protocols (SPI, I2C, Ethernet, USB)
Background in power design (DC-DC, LDO, Power Tree)
Experience in writing technical documents (Block diagrams, ATP, Bring-Up)
Understanding PCB Production process (DRC, VIA types, Ground methodology) - advantage
Working alongside layout designer
Knowledge in High-speed PCB design.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
Required Micro-Architect
Description:
A global leader in control systems for quantum computing, a field on the verge of exponential growth.
Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands.
At our core olies a passionate and ambitious team committed to reshaping the construction and operation of quantum computers.
Our work is fueled by a deep understanding of customer needs, driving us to deliver unparalleled solutions in this revolutionary field.
Join our cutting-edge hardware development team as Micro-Architect and play a key role in defining and implementing the micro-architecture of advanced digital logic components.
What You'll Do:
Define and develop micro-architecture for complex logic blocks - from concept through high-quality RTL implementation
Collaborate closely with architecture, verification, design and software design teams
Write clear and detailed design specifications and drive architectural trade-off analysis
Optimize for performance and area
Contribute to innovation, methodology improvements, and technical leadership within the team.
Requirements:
B.Sc. or higher in Electrical Engineering, Computer Engineering, or related field- Must
8+ years of experience in RTL design using Verilog/SystemVerilog- Must
Proven experience in designing micro-architecture for complex systems
Strong system-level understanding and problem-solving skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8875499
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Embedded Firmware Engineer, DSP, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will develop the real-time software "brain" of next-generation high-speed interconnects. You will write high-performance C/C++ code that manages critical power-on, reset, and calibration sequences, ensuring our custom silicon reaches peak performance and stability in milliseconds.
Responsibilities
Design and implement real-time embedded C/C++ code for data path control, management, and telemetry.
Develop low-level drivers and Hardware Abstraction Layers (HAL) to interface with custom digital signal processing (DSP) hardware blocks and registers.
Implement and debug firmware-based adaptation algorithms for equalizer tap updates and gain control (VGA/TIA).
Write unit tests and participate in continuous integration flows to ensure firmware stability across hardware revisions and emulation platforms.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, or a related technical field, or a equivalent practical experience.
7 years of experience in Embedded C/C++ programming.
Experience with Digital Signal Processing (DSP).
Preferred qualifications:
Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field.
Experience using Joint Test Action Group (JTAG), GDB, or Oscilloscopes.
Understanding of Fixed-Point arithmetic optimization for resource-constrained embedded systems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Test and DFT Engineer, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
Responsibilities
Collaborate with Architecture, Design and Verification teams to develop new product bring-up, validation, characterization, and qualification strategies and manufacturing test solutions for new High Performance Computing (HPC) products in advanced process technologies.
Verify test solutions on pre-silicon models (simulation or emulation) and develop Automated Test Equipment (ATE) test modules and binning flows.
Develop and validate test programs on Automated Test Equipment (ATE) platforms for new product integration (NPI) in preparation for high-volume manufacturing (HVM), working with ATE vendors and internal cross-functional teams.
Manage product sustainment support, including analyzing volume data, improving test time and yield, assessing test escapees and return merchandise authorizations (RMAs), localizing failures, implementing containment measures, and partnering with design, manufacturing, and quality and reliability teams to identify root causes and implement corrective actions.
Build tools, flows and methodologies to continuously improve and automate the testing life-cycle.
Requirements:
Minimum qualifications:
Bachelor's degree in Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience in test engineering.
Experience in pre-silicon validation, test content generation, automatic test equipment (ATE) program development, and post-silicon enabling from new product introduction (NPI) through high-volume manufacturing.
Experience with ASIC test methodologies (MBIST, ATPG, DFT, SerDes, and sensors).
Experience with Python, Java, C# or C/C++ and Advantest or Teradyne ATE platforms.
Preferred qualifications:
Masters in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
10 years of experience in test engineering, including product engineering.
Experience with CPU/GPU SoC architecture, design, validation and debug.
Experience in advanced testing methodologies and data analysis, including system to tester correlation, yield and test time analysis and improvement, etc.
Demonstrated expertise in developing automations for pre-silicon verification and post-silicon test-generation/test-program domains.
Inquisitive and motivated to venture into, and improve, all aspects of post-silicon testing from definition to realization.
This position is open to all candidates.
 
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4 ימים
Location: Tel Aviv-Yafo
Job Type: Full Time and Hybrid work
We are looking for an excellent design engineer to join our team and build our state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player, and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface.
Requirements:
BSc in electrical/computer engineering or relevant military background
At least 4 years of experience
Proven track record in RTL coding with System Verilog
Experience with System Verilog
VCS, Vivado - Advantage
This position is open to all candidates.
 
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דיווח על תוכן לא הולם או מפלה
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
12/10/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
We're seeking a talented, experienced Product Designer to join our Engineering team. You'll tackle complex design challenges daily, continuously improving our solutions and driving innovation in Kubernetes optimization, with the opportunity to work with cutting-edge technologies and collaborate with major cloud providers such as AWS, GCP, and Azure.

Collaborate with our engineering teams to define, design, and deliver best-in-class user experience that achieves our business objectives.
Craft every detail of new product features, from idea to user experience to execution.
Join a team of skilled professionals building our core product offering.
Partner with engineering to ensure our implementation and user experience are high-quality.
Operate with a high degree of autonomy and responsibility.
Make a direct impact on the company's future, working on the core product alongside top-tier engineers in a culture of innovation.
Requirements:
6+ years of design experience at a product-focused tech company, designing a complex system or platform.
Experience across the complete product life cycle, including prototyping, design, and usability testing.
Expertise with prototyping and design tools (Sketch, Figma, or similar).
Experience collaborating closely with R&D.
Ability to make quick decisions within a tight schedule in a dynamic environment.
A portfolio that showcases relevant experience.
This position is open to all candidates.
 
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Location: Petah Tikva
Job Type: Full Time
the Staff Product Designer within the Foresight organization serves as a strategic design leader responsible for translating emerging technologies, customer insights, and innovation initiatives into differentiated, trustworthy customer experiences.


Responsibilities

Interaction design - Distill ambiguous, frontier AI capabilities - agentic workflows, conversational interfaces, model-generated recommendations - into simple, trustworthy designs. Own and visualize end-to-end experiences across your product area and ensure consistency of patterns, flows, and mental models as capabilities move from incubation into scaled products.
Visual design - Role model high standards of taste, balancing creativity and innovation with consistency. Leverage expert-level craft to design novel visual and interaction solutions for AI-native surfaces that diverge from standard patterns and set the bar for what AI-native looks and feels like at Intuit.
Motion design - Focus on the detailed aspects of motion and experience quality; use motion to build trust and confidence in AI-generated outputs and agentic actions. Collaborate with engineering to drive motion capability across platforms and tools.
Designing with AI - Oversee the application of AI in your domain's design strategy, and deliver AI-assisted product experiences built on Foresight's own foundational models and agentic systems. Integrate content-generating AI into your own workflow to accelerate concepting, so your team spends more time on high-value design refinement.
Prototype in code - Design through working prototypes, not only static mocks. Use AI-assisted tooling to build functional HTML prototypes that demonstrate real motion, interaction, and experience quality - the fidelity needed to pressure-test agentic and conversational patterns before handoff. Prototypes are the primary artifact for demoing ideas to engineering and aligning partners, and should be built to a standard where the best of them can carry directly into production.
Design standards - Drive adherence to design standards and practices across Foresight's portfolio of initiatives (Ascend, Delphi, and other emerging efforts). Identify inconsistencies across experiences and lead efforts to address them as products move from one team's experiment to a capability used across Intuit.
Tools & systems - Champion standardized tool use across the team, and partner closely with Foresight's User Research and Design Technology functions to ensure design decisions are grounded in evidence and built on scalable systems. Organize and maintain shared resources in Figma, including templates for repeatable processes.
Strategy & storytelling - Apply strategic thinking to translate frontier research and complex model capabilities into intuitive, customer-centered journeys. Communicate design rationale with clarity and confidence to senior leaders - including CEO and CTO staff - make the complex feel obvious.
Facilitate and align - Lead cross-functional workshops, design reviews, and roadmap conversations that bring product, engineering, AI research, and business unit partners into a shared vision, across a fast-moving, matrixed environment.
Mentor and grow - Coach junior and mid-level designers on craft, process, and professional growth, and help shape Foresight's design culture as the organization scales.
Requirements:
8+ years of experience in product design, interaction design, or a related field - ideally designing AI-native, conversational, or agentic products. Experience designing generative AI or LLM-based interfaces is a strong plus.
Bachelor's degree in Human-Computer Interaction, Design, Computer Science, or equivalent practical experience.
Expert command of user-centered design methods, including systems thinking, interaction design, visual design, and research synthesis.
Proven track record of leading design from ambiguous, frontier-stage problems to shipped products at significant scale.
This position is open to all candidates.
 
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