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We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be in charge of developing physical design, synthesis, STA and Logic eq methodologies for implementation of networking chips and SOCs.

Work closely with block owners. full Chip STA engineers and project managers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for chip floorplan, power and clock distribution, P&R, timing analysis and closure, power and noise analysis and back-end verification across multiple projects.

We are looking for best-in-class Physical Design CAD Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.

Work closely with block owners, full Chip STA engineers to assure high quality and timely convergence.

Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.

Additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects.

We are looking for best-in-class Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! Come and take a part in designing our groundbreaking and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What you'll be doing:

Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

Be exposed and work on a variety of exciting designs. Resolving complex timing and congestion problems.

Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

Taking part in flow development.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SOC Performance Technical Lead, you will drive the success of our System-on-Chip (SoC) products. You will be focused on ensuring our SoCs deliver maximum performance, power efficiency, and cost-effectiveness. You will be a multi-disciplinary expert who can bridge the gap between deep learning, advanced algorithms, and hardware/software design to create innovative solutions for current and future product lines.
You will lead and oversee a team, setting the technical direction and making critical decisions on frameworks, methodologies, and tools. You will require a collaborative approach with various teams to ensure alignment with organizational goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
Exercise open source benchmarks, analyze the results, and find optimization opportunities.
Develop and implement advanced technologies for running benchmark representations on pre-silicon environments.
Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre and post-silicon environments.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Design Verification Engineer, you will work as part of a Research and Development team, and will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification which can range from verification planning, test execution or collecting, and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

We are looking for a Design Engineer for SOC Group.
In this role you will be familiar with cutting edge power management techniques including power management ICs control schemes, Chip power state transitions, SoC boot process and HW security solutions. You will define uArch spec, implement HW including RTL and UPF coding, synthesize the digital design to the latest process nodes and participate in the implementation process.
Description
Imagine what you could do here.
new ideas have a way of becoming extraordinary products very quickly.
Do you want to bring passion and dedication to your job? There's no telling what you could accomplish.
Do you want to join us to help deliver the next groundbreaking products?
The SoC design team is looking for an experienced engineer to develop compute SoCs power management system. Role expectations include working with partner Design teams, Physical design, verification, Platform Architecture and Software teams to define the power system micro architecture, implement the required HW and integrate it to a complex multi chip system.

In this highly visible role, you will be at the centre of a System-on-Chip design effort. collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly
Description
Lead the complete DFT solutions in a chip design by working with chip DFT team to document DFT specifications, and define the SoC test interface Develop and implement DFT architecture Work with the validation team to verify DFT implementations and implement design changes Generate structural test vectors, analyze and improve coverage Work with designers on STA, physical, power and logical issues Work with Test Engineers to bring up test vectors on silicon

We are looking for an excellent Firmware Design Engineer for NVIDIA FW PHY Group. The person will closely work with NVIDIA FW development, architecture, chip design teams and gain deep understanding of NVIDIA's Networking products and technologies. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team in the industry!

What youll be doing:

Work on NVIDIA current and next generation of Networking devices and GPU.

Build and create Firmware Phy solutions for our new SerDes and physical linkup flow.

Work closely with the architecture, HW, and SW design teams.

Define implement and maintain FW algorithm to control the Silicon.

Debug and screen HW/FW/SW issues.

Take an active part in silicon bring-up and SW development phases.

Work closely with our costumer support team to build solutions for our costumers.

Lead data-driven discussions about the product functionality and areas for improvement.

We are looking for talented and ambitious individuals to join our Yoqneam IC team.
Roles and responsibilities:
Join a team of VLSI frontend design engineers in projects.
Define, plan and implement our next chip in on-going product line and in a new product line of cryptography algorithms acceleration SoCs.
Work closely with multiple teams within organizations such as Architecture, BE, Circuit, Analog and FW
Responsible for scaling up the frontend design environment methodologies.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a CPU Design Verification Engineer, you will work as part of a Research and Development team building verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify complex digital designs. You will collaborate with design and verification engineers in active projects and perform verification. You will be responsible for the full lifecycle of verification which can range from verification planning, test execution, or collecting and closing coverage.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Apply close coverage measures to identify verification holes and to show progress towards tape-out.

Were looking for a talented Post Silicon Lead to join our IC group.
Responsibilities:
Lead and manage the post-silicon activities for Arbes mixed-signal and RFIC chipset (with emphasis on mixed-signal).
Take part in the definition and productization of radar chips.
Support and validation of bring-up activities (first bring-up, characterization, reliability, testability) for mixed-signal and RFICs.
Drive chip testing infrastructure including tools, equipment, and test code.
Work closely with the manufacturing and OSAT test teams.
Collaborate with other R&D teams from the architecture phase through production.

We are looking for DevOps Engineers to join our technical teams in Sofia, Bulgaria and Haifa, Israel. By joining us you become part of a team tackling numerous different architectures and customer deployments from various industry sectors. Due to the volume and diversity of the jobs responsibilities, we can guarantee that you will not be stuck on doing the same tasks over and over again.
If you are a skilled, ambitious, and proactive individual who is looking to greatly expand your personal knowledge while making a real difference, then we want you to apply and join our team of cloud superstars.
Key Responsibilities:
Design and Implement Cloud Solutions:
Architect and deploy secure and scalable cloud infrastructure on Google Cloud Platform (GCP).
Design custom cloud solutions that integrate with various systems and technologies.
Client Consultation and Collaboration:
Work closely with clients to understand their business needs and technical requirements.
Provide expert guidance on GCP best practices and recommendations.
Cross-Platform Knowledge:
Utilise knowledge of AWS, Azure in addition to GCP for designing interoperable solutions.
Ability to navigate and integrate solutions across different cloud platforms.
Project Management:
Lead and manage cloud-related projects from conception to completion.
Collaborate with cross-functional teams for successful project execution.
Technical Leadership:
Stay updated with the latest cloud technologies and trends.
Guide and mentor junior team members in cloud technologies.
Pre-Sales Involvement (Plus):
Assist in pre-sales activities, including solution presentations and demonstrations.
Help in preparing technical proposals and cost estimates.
Additional Info:
Send us your CV in English and become part of our team!
Only short-listed candidates will be contacted.
Confidentiality of all applications is assured!

Design and characterize solutions architectures in the public cloud and collaborate with a team of architects.
Implement and realize architectures across a variety technological components and services.
Develop automation and scripts based on infrastructure As A Code (e.g., Terraform)
Implementing and applying cloud security solutions.
Maintain ongoing interfaces with the organization's cloud security and cloud protection teams.
Identify and realize new opportunities and technologies in the cloud domain.
Maintain ongoing interface with companies and organizations in the field of cloud, both in Israel and within the community.

As QA Architect, you will be collaborating with an individual SaaS development team, that uses the latest technologies in continuous delivery to secure the top enterprises in the world. You will serve as the QA architect in the R&D team, committed to the quality of the released content and define QA work procedures, guidelines, and design the entire testing process.
Comprehensive understanding of the product's functionality, target use cases, and the value it delivers to customers.
Develop and maintain expertise in the creation and deployment of fully integrated environments
Define, implement, and manage QA processes, including the specification of required test plans and procedures.
Actively track the teams tasks, conduct testing of features during development to ensure adherence to specifications and quality standards.
Perform efficient log analysis and reproduce customer issues quickly to facilitate timely resolution.
Analyze and challenge existing testing coverage
Implement automation tests for new features and coverage gaps
Maintain and prioritize backlogs of open issues and bugs, ensuring effective tracking and resolution.
Monitor the test and production environments, using DevOps tools.