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What will you be doing?
Lead research, evaluation, and architectural definition of next-generation chips - from requirements through production.
Define next-generation Packet Processor / Datapath / Congestion Management architectures for high-performance, complex SoC Ethernet Switches.
Design the system architecture and detailed micro-architecture definition across major functional blocks.
Collaborate closely with design, verification, and modeling teams to ensure architectural intent is fully realized.
Work cross-functionally with other architecture teams to shape cohesive system solutions.
Explore and evaluate new technologies and innovative approaches for future products.

Define the AI core architecture that will shape the next generation of AI chips, leading the global competition in AI computing power. As a key contributor to the competitiveness of AI core architecture, we drive chip architecture innovation starting from algorithm evolution, building a full-stack closed-loop capability of "algorithm-architecture-circuit-system," and creating a globally leading, independently controllable AI accelerator core to support the Ascend AI ecosystem and the implementation of large model strategies.
Responsibilities:
Modeling of HW specification of new architecture and microarchitecture. Working closely with architect and microarchitecture on modeling the specification.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Develop and optimize the overall layout of the chip, including partitioning, macro and IP placement, and pin placement.
Design and implement efficient power delivery networks power grids to ensure stable power to all parts of the chip.
Develop and validate high-performance, low-power clock networks (e.g., Clock Tree Synthesis (CTS)) to ensure proper synchronization across the entire chip.
Develop, enhance, and maintain custom scripts (e.g., Tcl, Perl, Python) for automation and improved efficiency.
Conduct extensive Design Rule Checks (DRC) to ensure the layout adheres to manufacturing rules, performing Layout Versus Schematic (LVS) checks to verify that the physical layout matches the logical design.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use the ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Lead the Design Activities at IPs, SubSystems(S.S) and SoC.
Plan, execute, track progress, assure quality, report status of the assigned activity.
Lead a team of designers both directly and in teams.
Define the Block/SoC level design documents such as Micro Architectural Specifications.
Own IP, S, SoC strategies for clocks, resets, and debugs. Enforce global methodologies and drive enhancements.

We are now looking for a Senior Chip Design RTL Design Engineer for the Switch Silicon group.

As a Chip Design Engineer at NVIDIA's Networking business unit, you'll join a group of passionate engineers to design and implement the next generation state of the art Switch Silicon chips. In this position, you'll make a real impact in a dynamic, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency!

What you'll be doing:

Work in a combined design and verification team which develops some of the switch silicon core units.

Plan and Design RTL units / blocks according to Arch & Micro arch specifications under challenging constraints with high orientation to power, area, and performance.

Build reference models, verify and simulate chip blocks/entities according to specifications.

Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, and FW.

Looking for a CPU performance modeling architect to take responsibility over the performance aspects of new CPU instructions or modes of operation. The role includes but is not limited to:
Partners with lead SW and HW architects to co-invent optimal HW and SW solutions that come to address requirements. Influences the direction based on experiments and simulation data
Models CPU functionality, performance and/or power in pre-silicon simulators
Defines and runs performance experiments to aid feature definition. Such experiments can be performed on a pre-silicon simulation environment or in a real system or on a combination of both or even in combination with analytical models
Provides experimental/proof of concept for new features and implementation alternatives meeting performance constraints.
Analyzes the bottlenecks of current CPUs on workloads that reflect CPU future usages
Potentially (in the future), lead a team doing above activities
An adequately qualified candidate can also become the leader of definition for some features in addition to all the roles above.

We are at the forefront of developing autonomous driving systems with leading oems, by integrating our state-of-the-art ecus into various vehicles. we are seeking a Embedded systems software architect to own the technical direction of our Embedded software platforms. this role combines hands-on development, system architecture, and technical leadership, guiding a team of Embedded engineers while ensuring high-quality, scalable, and reliable software across current and future products. you will act as the technical authority for Embedded software, working closely with hardware, systems, and product stakeholders to translate requirements into robust software solutions.
what will your job look like?
lead the technical direction and architecture of Embedded software platforms across middleware and application layers.
serve as the technical authority for Embedded software, combining hands-on C / C ++ development with system -level ownership.
design scalable, modular software architectures and define clear interfaces between hardware, os services, middleware, and application software.
drive key technical decisions, architectural trade-offs, and long-term roadmap.
develop and integrate middleware and application-layer components, including multi-threaded and Real-Time logic.
lead design reviews, mentor Embedded software engineers, and promote high coding and architectural standards.
take ownership of complex system -level debugging, performance optimization, and software quality.
work closely with os, systems, product, QA, and manufacturing teams to translate product requirements into robust technical solutions.

We are at the forefront of developing autonomous driving systems with leading oems, by integrating our state-of-the-art ecus into various vehicles. we are seeking a Embedded systems software architect to own the technical direction of our Embedded software platforms. this role combines hands-on development, system architecture, and technical leadership, guiding a team of Embedded engineers while ensuring high-quality, scalable, and reliable software across current and future products. you will act as the technical authority for Embedded software, working closely with hardware, systems, and product stakeholders to translate requirements into robust software solutions.
what will your job look like?
lead the technical direction and architecture of Embedded software platforms across middleware and application layers.
serve as the technical authority for Embedded software, combining hands-on C / C ++ development with system -level ownership.
design scalable, modular software architectures and define clear interfaces between hardware, os services, middleware, and application software.
drive key technical decisions, architectural trade-offs, and long-term roadmap.
develop and integrate middleware and application-layer components, including multi-threaded and Real-Time logic.
lead design reviews, mentor Embedded software engineers, and promote high coding and architectural standards.
take ownership of complex system -level debugging, performance optimization, and software quality.
work closely with os, systems, product, QA, and manufacturing teams to translate product requirements into robust technical solutions.

A leading software company delivering a full spectrum of software services that enable customers to focus on their core business activities. We leverage the Web by administering cross-platform development. We strive to build and maintain our top-notch expertise in this extremely dynamic and versatile field. A Software Architect is a technological leader, responsible for architecting, designing and implementing a software solution end to end. While having overall responsibility for a project, our architect is also part of the engineering team due to our passion for coding. In addition, the Software Architect is in charge of mentoring team members - keeping them up-to-date on technology and the project on track. If you are a technological leader with the ability to see the big picture, passion for coding and a team player, you should apply for this position! As a Solution Architect, you will be responsible for:
*  Design and implement the architecture for large-scale, distributed systems, from concept to production.
*  Develop high-performance, secure, and scalable technical architecture designs that support Big Data and AI workloads.
* Collaborate closely with Product Managers, data Scientists, and Engineering teams to translate user stories and business requirements into robust technical solutions.
*  Work side-by-side with DS and data engineers, fostering knowledge sharing, architectural governance, and best practices.
* Investigate and introduce emerging technologies to enhance scalability, reliability, security and innovation across the platform.

As part of System Architecture group, the Cybersecurity System Architect will define the end-to-end architecture of advanced network security services, such as intrusion prevention systems (IPS), and host-based intrusion detection systems (HIDS) and firewalling. This role is at the forefront of integrating deep security intelligence into high-performance, scalable network operating systems and telecom-grade platforms.
As part of R&D core function, shaping next-generation secure network infrastructure by embedding deep packet inspection, behavioral analytics, and threat mitigation into the product architecture.
Responsibilities
1. Architecture of Integrated Security Services
Define and lead the system architecture for L3-L7 firewalling, stateful inspection, policy enforcement, and application-aware filtering.
Architect integration of IPS, DPI, signature- and anomaly-based detection, and evasion-resilient detection engines into control and data plane systems.
Specify how HIDS capabilities will be embedded or interfaced with NOS components for detecting host-based anomalies and compromise indicators.
2. Threat Detection & Prevention Frameworks
Design scalable architectures that support high-speed signature matching, traffic heuristics, and flow analysis under real-world traffic conditions.
Define mechanisms for rule updates, threat intelligence feeds, and integration of ML-based detection algorithms.
Architect policy engines for complex rule matching, including user-defined policy trees and hierarchical control structures.
3. Secure System Integration
Lead system-level threat modeling and security design reviews across platform, OS, and networking protocol layers.
Define secure communication paths, trust boundaries, and cryptographic protections for sensitive metadata, logs, and update mechanisms.
Ensure proper isolation and sandboxing of inspection/control modules, especially in multi-tenant or containerized environments.
4. Performance and Resilience Considerations
Design architectures to meet line-rate security enforcement, ensuring minimal latency overhead while preserving packet integrity.
Align with the HW Architecture for performance optimized flow offload strategies (e.g. hardware-assisted DPI).

we are seeking a Hands-on Architect to design, build, and evolve the core of next-generation AI cybersecurity platform.This is not an ivory-tower role; it is for a builder at heart.
You will write code, build functional prototypes, and own critical services from inception to production.
This role demands a unique blend of deep, code-level execution with a broad, system-wide architectural vision that spans our entire data, cloud, and AI stack.
Responsibilities:
Rapidly code and build functional proofs of concept (PoCs) and prototypes to explore and validate new architectures, data platforms, data processing frameworks, and GenAI capabilities.
Validate technical feasibility, scalability, and business impact through working software, not just diagrams or documents.
Partner closely with engineering, product and data science teams to translate emerging technologies into production-ready, scalable systems.
Lead architecture design reviews, proactively identify scalability and performance bottlenecks, and embed security principles into the design process from day one.
Serve as a technical leader and mentor, elevating the team's skills through pair programming, in-depth code reviews, and deep-dive sessions on system design and software craftsmanship.

we are seeking a skilled and adaptable Solution Architect to lead deep technical engagements during both pre-sales and post-sales phases. You will ensure seamless deployment, resolve complex technical issues, and deliver long-term value to customers through our companys AI-powered cybersecurity platform.
This role also includes ownership of lab environments to simulate customer use cases, validate solutions, and support internal testing and demos-making it a key technical bridge between Product, Engineering, and Customer Success.
The Responsibilities
Build and maintain strong relationships with customers, serving as a trusted technical advisor to understand and address their needs, challenges, and goals.
Collaborate with internal teams, including R&D and Product, to align customer feedback with roadmap priorities and platform improvements.
Lead the technical aspects of Proof of Concepts (PoCs) and guide customers through pre-deployment readiness.
Drive post-sales success by resolving complex issues, optimizing deployments, and identifying opportunities to improve security posture.
Deliver technical enablement and training sessions for customer teams to ensure strong adoption and platform fluency.
Stay informed on the latest in cybersecurity, infrastructure, AI, and cloud technologies to continuously elevate customer outcomes.
Lab Environment Ownership: Responsible for designing, maintaining, and automating lab environments that simulate real world customer deployments to test product features, validate integrations, demonstrate the company platform, and support cross-functional testing and customer issue replication.

As a Cloud Architect, you will serve as a technical focal point, driving strategic architectural decisions that shape the future of our globally distributed platform.
Platform & Scale Leadership: Lead the architectural efforts to modernize and significantly scale the companys infrastructure across multiple geographies and heterogeneous cloud providers.
Cross-Organizational Influence: Work with other groups in the organization to deeply understand their needs and translate them into concrete, production-ready capabilities and platform offerings.
Multi-Cloud Data Strategy: Define and champion a comprehensive, petabyte-scale multi-cloud data strategy, ensuring optimal data governance, security, and cost-efficient flow for streaming ingestion, data lakes, and advanced analytics workloads across environments.
Microservices Design & Resilience: Provide high-level architectural oversight for the multi-cloud design patterns of our microservices, focusing on cross-cloud resilience, global traffic management, data locality, and failure domain isolation.
AI Transformation Leadership: Lead the AI transformation initiatives aimed at radically enhancing the developer experience, introducing intelligent automation, and leveraging generative AI models to accelerate software delivery, testing, and operational efficiency.
Strategic Alignment: Foster cross-group alignment and build consensus among engineering leaders and business stakeholders for strategic platform projects, translating complex technical roadmap items into clear, measurable business outcomes.
Architecture Definition: Help define the technical vision, architecture, and long-term directions of the Cloud Platform group and the wider R&D organization.
Engineering Excellence: Be a champion for engineering excellence, setting high standards, mentoring engineers across the group to foster solid architectural principles, and supporting their professional growth.
Architect Forum Participation: Be a key member of the companys architect forum, participate in complex technical discussions, and facilitate effective, org-wide decision-making processes.

We are seeking a Principal Software Architect to lead the end-to-end design and technical specification of our next-generation ADAS/AD software platform. You will define the architectural vision across key modules-including perception, localization, planning, and embedded platforms-while serving as the technical authority translating product goals into deliverable system specifications. As a "whole-system" expert, you will provide critical technical advisory in customer engagements and serve as the primary "go-to" for complex system-level challenges.
Responsibilities
Software Architecture Leadership:
System Design: Evolve high-level architecture for the ADAS/AD stack, including sensor ingestion, perception, localization, and planning.
Compute Partitioning: Map software components across heterogeneous resources (CPUs, GPUs, NPUs, MCUs) with a deep understanding of SW/FW-oriented execution.
Performance Optimization: Ensure architecture is optimized for multi-threaded, real-time embedded environments (Linux/QNX).
Middleware Integration: Lead the selection and integration of solutions such as DDS, ROS2, and AUTOSAR.
Technical Strategy & Advisory:
Technical Vetting: Review product and marketing requirements for feasibility; provide expert "push-back" and advise on optimal architectural alternatives.
Customer Consultation: Act as the primary technical interface in customer meetings, translating complex technical constraints into clear roadmaps.
Design Specification: Drive technical decomposition of features into architectural specifications and Interface Control Documents (ICDs).
Traceability: Ensure technical designs are aligned with ASPICE-compliant processes and safety goals.
Technical Coordination & System-Level Support:
Technical Anchor: Serve as the primary escalation point for critical system-level "Big Issues," performing root-cause analysis across the full software stack.
Cross-Domain Liaison: Bridge Software, Systems, Hardware, and Validation teams to ensure Hardware-Software Interface (HSI) alignment.
Architecture Reviews: Lead technical audits and conduct DFMEA/DFA to ensure system robustness.
Quality & Compliance:
Ensure architecture compliance with ISO 26262 (Functional Safety) and ISO/SAE 21434 (Cybersecurity).
Support SPICE Level 2+ software quality processes through rigorous design documentation.

Required Quality Architect
Job responsibilities
About you:
This role combines strategic vision, deep technical expertise, and strong people leadership, as you build our quality framework from the ground up.
You will define what quality truly means for our organization and drive continuous improvement across teams, processes, and our tech stack by mapping the current state, identifying key gaps, and focusing on the highest-impact opportunities.
Operating both hands-on and at the executive level, you will design and lead standards, frameworks, and best practices that raise the quality bar while remaining effective under change, scale, and disruption. In this role, you will help teams make sound tradeoffs under pressure, reduce late-stage surprises, and strengthen the resilience of our Tech organization, while aligning and engaging stakeholders across Product, Design, and Engineering.
Success in this role looks like teams catching risks earlier, making clearer tradeoffs, and delivering reliably even as priorities change, with quality practices that scale without slowing teams down.
What will you actually be doing?
Define and own our Tech quality strategy, driving the cultural change needed to embed a quality & resilience mind set at every level.
Map our current signals and practices, define what quality & resilience means for us, and design a clear roadmap for continuous improvement.
Act as the strategic and technical authority for quality, setting methodologies, standards, and best practices across teams.
Partner with engineering, Product, Design and other stakeholders to ensure quality is designed into every stage of our development lifecycle.
Architect and govern the end-to-end quality lifecycle, from planning to delivery, surfacing risks early and ensuring reliable outcomes.
Pioneer innovation in quality engineering, leveraging automation, observability, and AI to create smarter, faster, and more scalable practices.