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The AI software team is building solutions that enable the latest AI models and workflows to run efficiently on our unique hardware architecture-unlocking a new level of performance.

Our team is looking for a skilled professional to join the AI software group. In this role, you will focus on our AI kernel compilers, ensuring our hardware delivers peak optimization for sophisticated and custom AI kernels. You will work extensively with various kernel infrastructures, including Triton and CUDA, while collaborating closely with our AI graph compiler teams.

Responsibilities
Develop our AI kernel compilers and related components in the SW stack.
Drive the performance optimization of AI models running on our unique architecture.

Responsibilities
Review specifications and develop attributes, tests, and coverage plans
Define methodology and test benches.
Work closely with the verification team to ensure the quality of the product
Build and maintain a smart and scalable verification environment that ties into various systems.
Work with the software, design, and micro-architecture teams to understand the functional and performance goals of the products design.

We are looking for a talented and experienced engineer to participate in the physical design of the companys product for leading one of our BE projects. This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on product architecture.

Responsibilities
Generate and analyze critical block- and chip-level static timing constraints
Spec and define full chip floor plan, including pin placement, partitions, and power grid.
Develop and validate high-performance, low-power clock network guidelines.
Perform critical block-level place and route and create designs that meet timing, area, and power constraints.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations.
Work with vendors on defining physical design methodologies and assist in flow development for chip integration.

We are looking for a talented and experienced engineer to participate in designing the next era of computer architecture. In this position you will take part in designing the critical parts of our future chips. You will transform architectural requirements to micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.

Responsibilities
Define and drive the design of advanced blocks from micro-architecture phase to netlist.
Support timing and constraints definitions work closely with the BE team on timing and physical implementation efforts.
Leading processes relating to power optimization.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

We are looking for an experienced, talented CPU ASIC front-end design expert and technical lead. In this role, you will take part in developing cutting-edge high performance best in class RISC-V CPU, from definition stage through planning stage and the development of new features while solving challenging implementation problems and ending in successful tape-out and product bring-up.

Responsibilities
Learn high performance RISC-V Arch and algorithms.
Define and drive the design of advanced and super complexed blocks from micro-architecture phase to tape out.
Work closely with various teams to drive execution (SW, Architecture, verification, BE, FPGA, postSi etc).
Devise execution indicators and monitor and report execution progress to enable prioritization and clear decision making.

Come help lead the design and development of one of the most ambitious products at the forefront of compute technology!

Responsibilities
Lead a physical design team responsible for all stages of the physical design process-floor planning, placement, clock tree synthesis, routing, timing, and power optimization at both block and subsystem levels.
Mentor and guide a team of physical design engineers through all stages of the design flow.
Collaborate closely with project managers and other technical leads to ensure timely delivery and successful completion of projects.
Drive the technical direction of the physical design process to ensure efficient, high-quality outcomes.
Develop and implement best practices for physical design and continuous improvements of design workflows.
Optimize designs for performance, power, and area (PPA) to meet project goals.
Ensure compliance with DRC (design rule checking) and LVS (layout versus schematic) requirements.
Drive timing analysis and closure, working closely with the RTL design team to resolve timing violations.

We are looking for a talented and experienced Physical Design lead to take part in the physical design and help lead the companys BE activities . This position involves working with external back-end developers as well as carrying out critical tasks in-house, and leading aggressive back-end initiatives to meet challenging targets in terms of area, timing, and layout. In this role, you will be at the center of the companys design efforts and will have a significant influence on our final product.

Responsibilities
Lead blocks and sub systems execution from RTL to GDSII.
Clearly reflect status and execution metrics and help identify and solve execution bottlenecks.
Spec and define full floor plan, including pin placement, partitions, and power grid.
Develop and validate high-performance, low-power clock network guidelines.
Perform critical block-level place and route and create designs that meet PPA targets.
Review the vendors physical design verification flow at chip and block level and guide other designers on how to fix LVS and DRC violations.
Work with vendors on defining physical design methodologies and assist in flow development for chip.

We are looking for a talented and experienced Logic Design Group Lead to drive and help our group to get to the next era of computer architecture. In this position, you will lead the architecture of our future chips, driving system-level understanding and the overall architectural flow. You will manage managers and technical leads while remaining highly hands-on, taking an active role in architectural decisions and technical execution across the system.

Responsibilities
Be accountable for your group's milestones & timelines
Leading your Group Architecture and developing their abilities
Technology expert, building a knowledge base for the group
Work with various teams to drive execution (SW, Architecture, verification, BE, etc)
Devise execution indicators, monitor and report execution progress to enable prioritization and clear decision-making
Acquire the system Architecture and be part of the leading technical FE forum

We are looking for a talented and experienced Logic Design Group Lead to drive and help our group to get to the next era of computer architecture. In this position, you will lead the architecture of our future chips, driving system-level understanding and the overall architectural flow. You will manage managers and technical leads while remaining highly hands-on, taking an active role in architectural decisions and technical execution across the system.

Responsibilities
Be accountable for your group's milestones & timelines.
Leading your Group Architecture and developing their abilities.
Technology expert, building a knowledge base for the group.
Work with various teams to drive execution (SW, Architecture, verification, BE, etc).
Devise execution indicators, monitor and report execution progress to enable prioritization and clear decision-making.
Acquire the system Architecture and be part of the leading technical FE forum.

We are seeking a talented Program Manager to join our team. In this high-visibility, hands-on role, you will drive forward the development of our chip by managing the complete program lifecycle, from architecture to successful tapeout, ensuring deliverables meet scope, schedule, and quality requirements.

Responsibilities
Lead the planning, development and implementation process of cross-functional teams focused on product delivery.
Drive the execution of the hardware roadmap by managing the complete lifecycle from architecture definition to tapeout.
Partnering tightly with Architecture, RTL Design, and Design Verification (DV) leads to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule.
Define the core operational processes and modes of work for the entire HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification.
Oversee project monitoring, reporting, and risk management, from initiation to delivery, addressing intergroup dependencies to ensure timely and successful completion.
Lead process and methodology improvements, proactively addressing issues to achieve business goals.

We are looking for a talented and experienced engineer to take part in the Emulation and Prototyping efforts for the companys core product. This position involves building a complex emulation environment from scratch, and collaborating with software, design, and verification teams. In this role, you will be leading emulation from A to Z and will have a critical impact on the company.

Responsibilities
Develop and build complex emulation models for coming generations of our accelerators, including transactors like PCIe, SPI, and embedded CPUs.
Work with the software, design, development, and verification teams to understand the functional and performance goals of the products design.
Optimize the model for speed and capacity and develop debug abilities to support software and firmware teams.
Work with software design and development teams to define and develop BFM, test bench, and checker tools.
Review specifications and develop attributes, tests, and coverage plans for the emulation system.

We are looking for a Head of DevOps to own the strategy and standards for the function that keeps our cloud infrastructure fast, reliable, and secure. You'll manage the DevOps team lead, giving direction on architecture, priorities, and the technical bar while they run the team's day-to-day work. You'll be the person engineering leadership turns to when infrastructure and security decisions need to move fast without cutting corners
Responsibilities:
Manage the DevOps team lead: set direction, priorities, and the technical bar for the team, and support their growth as a manager
Own our cloud infrastructure and architecture (multi-cloud), including provisioning, scaling, and cost governance
Drive CI/CD, release processes, and deployment reliability so engineers can ship confidently
Own observability and incident response tooling, ensuring issues are caught early and resolved fas
Introduce and evaluate new cloud technologies and tools to improve delivery, scalability, and availability
Partner with R&D, product, and IT leadership to align infrastructure decisions with business needs
Own the R&D budget: plan and track spend, prioritize investment across infrastructure, tooling, and security, and report on it to leadership

We're looking for a Principal Software Engineer to take end-to-end ownership: from research and design through production, on systems that combine classical algorithms with AI/LLM-based capabilities. This is an AI-native role in both senses - you'll build security for AI systems, and you'll work AI-first yourself, using coding agents across the development lifecycle and knowing how to get consistently high-quality results from them.
You'll work as a senior individual contributor with real influence over architecture and product direction, collaborating directly with security researchers, data scientists, and product managers across our Poland and Israel teams (1-hour time difference - genuine daily collaboration, not satellite work).
What You'll Do:
Own solutions end to end - from studying the domain and generating your own ideas, through research and design, to coding, shipping, and supporting them in production.
Drive independent research in a new domain where problems are not fully defined, balancing innovation with practical, cost-effective engineering
Build and evolve backend & frontend, extending traditional microservices with AI/LLM-based capabilities
Use AI agents throughout development - research, design, coding, and testing - to raise both speed and quality
Work closely with security researchers, data scientists, and product managers to turn ideas into shipped product

we are looking for a Financial Planning & Analysis Manager.
We are also committed to building a collaborative, empowering workplace. If you are excited about this role but do not meet every requirement, we encourage you to apply. Your perspective could be exactly what we need!
The FP&A Manager will play a key role in financial planning, forecasting, reporting and business analysis. You will partner closely with leaders across the organization, translate financial and operational data into actionable insights and help management make informed decisions that support sustainable growth.
This is a highly visible position for someone who combines strong analytical capabilities with commercial understanding, attention to detail and the ability to communicate clearly with stakeholders at all levels.
What you'll do:
Lead annual budgeting, quarterly forecasting, and long-range planning across the business
Deliver monthly and quarterly management reporting, including budget-vs-actual analysis and forward-looking insight
Build and maintain financial models covering revenue, headcount, opex, cash flow, and strategic initiatives
Track business performance to surface trends, risks, and opportunities early
Partner with Sales, Marketing, R&D, Customer Success, and HR on planning, resource allocation, and performance management
Analyze SaaS metrics - ARR, bookings, retention, churn, gross margin, CAC, and unit economics - to inform decisions
Build business cases and scenario models that support investment and strategic decisions
Present clear analysis and recommendations to senior leadership and the board, and drive improvements to financial processes and tooling along the way

we are looking for a Account Executive.
This is not a classic AE role of just working your own pipeline. It's something rarer: a quota-carrying Account Executive across EMEA and APAC who understands the importance of enabling local channel partners to expand opportunities.
If you're already the rep your own team asks for advice on positioning and objection handling, this is your door in. We will give you the quota, the territory and the hottest product in AppSec. You bring the drive, direct and through every partner you touch.
What You'll Do:
Own and close a direct sales quota across EMEA and APAC, running full-cycle deals from first call to signature
Drive the enablement engine for our partner network in your territory by coaching partner sellers on positioning, differentiation and objection handling until they pitch Mend like they built it
Get hands-on technical: run demos, sharpen partner pre-sales pitches, and speak credibly about AppSec and AI security to any room, from developers to CISOs
Build the enablement content partners actually use (i.e., playbooks, deal-review coaching, certifications) with marketing assistance
Manage our partners to keep direct and partner motions aligned, not competing for the same whitespace
Forecast your own pipeline accurately and keep it clean in Salesforce
Represent Mend.io at partner and industry events across the region