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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our companyusers worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital reasoning design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog.
Experience with reasoning synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power and design techniques.
Experience in reasoning design and debug with Design Verification (DV).
Preferred qualifications:
Experience with a scripting language like Python or Perl.
Experience with design sign-off and quality tools (e.g., Lint, clock domain crossing (CDC), etc).
Knowledge of System on a chip (SOC) architecture and assertion-based formal verification.
Knowledge of design techniques.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate SDRAM (DDR), Advanced Extensible Interface (AXI), ARM processors.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use your ASIC design experience to be part of a team that develops the ASIC SoC from Plan of Record (POR) to Production. You will be creating SoC Level micro architecture definitions, RTL coding and will do all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies. You will collaborate with members of architecture, software, verification, power, timing, synthesis dft etc. You will face technical tests and develop/define design options for performance, power and area.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Participate in architecture feedback.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques.
Experience with design sign off and quality tools (e.g., Lint, CDC, etc.).
Experience with SOC architecture.
Experience in logic design.
Preferred qualifications:
Master's degree or PhD in Computer Science or a related technical field.
Knowledge in one of these areas: Peripheral Component Interconnect Express (PCIe), Universal Chiplet Interconnect Express (UCIe), Double Data Rate (DDR), Advanced Extensible Interface (AXI), or Advanced RISC Machines (ARM) processors family.
Knowledge of high performance and low power design techniques.
Knowledge of assertion-based formal verification.
Excellent problem-solving and debugging skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM), or formally verify designs with SystemVerilog Assertion (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
4 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
Experience with verification techniques, and the full verification life-cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8413236
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure. You will verify digital designs, collaborate closely with design and verification engineers on projects, and perform direct verification. You will build constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
8 years of experience with creating and using verification components and environments in standard verification methodology.
Experience verifying digital logic at RTL level using SystemVerilog or Specman/E for FPGAs or ASICs.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with Application-Specific Integrated Circuit (ASIC) standard interfaces and memory system architecture.
Experience in four or more System on a chip (SOC) cycles.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8412928
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
Perform Register-Transfer Level (RTL) coding (coding and debug in Verilog, SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure activities.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with digital logic design principles, RTL design concepts, and languages, such as Verilog or SystemVerilog.
Experience with logic synthesis techniques to optimize RTL code, performance and power, as well as low-power design techniques.
Experience with design sign-off and quality tools (e.g., Lint , CDC , etc.).
Experience with SoC or IP architecture.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
Knowledge of high-performance and low-power design techniques, assertion-based formal verification, Field-programmable Gate Array (FPGA) and emulation platforms, and SoC architecture.
Knowledge in one of the following areas such as Double Data Rate (DDR)/Low Power Double Data Rate (LPDDR), High-bandwidth memory (HBM).
Excellent problem-solving and debugging skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8412913
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a System on a Chip (SoC) Design for Test (DFT) Engineer, you will be responsible for defining, implementing, and deploying advanced DFT methodologies for digital or mixed-signal chips. You will define silicon test strategies, DFT architecture, and create DFT specifications for next generation SoCs. You will design and verify the DFT logic and prepare for post silicon and co-work/debug with test engineers.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers , our company Cloud customers, and billions of our company users worldwide.

We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Develop DFT strategy and architecture (e.g., Memory Built-In Self Test (MBIST), Automatic Test Pattern Generation (ATPG), hierarchical DFT).
Complete all Test Design Rule Checks (TDRC) and design changes to fix TDRC violations to achieve high-test quality.
Insert DFT logic, boundary scan, scan chains, DFT Compression, Logic Built-In Self Test, Test Access Point (TAP) controller, clock control block, and other DFT IP blocks.
Insert MBIST logic including test collar around memories, MBIST controllers, eFuse logic, and connect to core and TAP interfaces.
Document DFT architecture, test sequences, and boot-up sequences associated with test pins.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, a related field, or equivalent practical experience.
3 years of experience with Design For Test (DFT) methodologies, DFT verification, and industry-standard DFT tools.
Experience with ASIC DFT synthesis, simulation, and verification flow.
Experience in DFT specification, definition, architecture, and insertion.
Preferred qualifications:
Master's degree in Electrical Engineering.
Experience working with ATE engineers (e.g., silicon bring-up, patterns generation, debug, validation on automatic test equipment, debug of silicon issues).
Experience in IP integration (e.g., memories, test controllers, Test Access Point (TAP), and Memory Built-In Self Test (MBIST)).
Experience in SoC cycles, silicon bringup, and silicon debug activities.
Experience in fault modeling.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8412892
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סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SOC Performance Technical Lead, you will drive the success of our System-on-Chip (SoC) products. You will be focused on ensuring our SoCs deliver maximum performance, power efficiency, and cost-effectiveness. You will be a multi-disciplinary expert who can bridge the gap between deep learning, advanced algorithms, and hardware/software design to create innovative solutions for current and future product lines.
You will lead and oversee a team, setting the technical direction and making critical decisions on frameworks, methodologies, and tools. You will require a collaborative approach with various teams to ensure alignment with organizational goals.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Utilize performance and power models from the architecture team, as well as lab measurements, to validate and tune performance against established goals.
Exercise open source benchmarks, analyze the results, and find optimization opportunities.
Develop and implement advanced technologies for running benchmark representations on pre-silicon environments.
Analyze complex problems, identify core design weaknesses, and drive the resolution of performance issues in both pre and post-silicon environments.
Develop performance measurement frameworks, including Key Performance Indicators (KPIs), to produce regular reports and dashboards that support stakeholder decision-making.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Computer Engineering, or Electrical Engineering, or equivalent practical experience.
8 years of experience in SoC or CPU performance and power modeling, analysis, and debugging.
Experience in programming languages such as C, C++, Python, or Similar.
Experience in computer architecture, including in areas like interconnects, traffic QoS, distributed caches, and I/O flows.
Preferred qualifications:
Experience with hardware description languages like Verilog or SystemVerilog.
Experience in pre and post-silicon analysis and debugging.
Experience in productizing features that enhance the performance or power characteristics of a design.
Experience in building fast, accurate SoC/CPU performance models in C++.
Experience in one or more functional areas, such as coherent fabrics (e.g., AMBA CHI/AXI), memory controllers (e.g., LPDDR5, DDR5), or I/O controllers (e.g., PCIe, CXL).
Ability to independently identify, troubleshoot, and solve complex performance problems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8412773
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דיווח על תוכן לא הולם או מפלה
מה השם שלך?
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סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
 
משרה בלעדית
13/11/2025
סוג משרה: משרה מלאה
ארגון פיננסי באזור המרכז מגייס ארכיטקט/ית אבטחת מידע
התפקיד כולל: ניתוח וגיבוש ארכיטקטורת הגנת סייבר בתשתיות מחשוב מורכבות, הובלת תהליכי בקרה, ניתוח סיכונים ותהליכי בחינת מוצרים וטכנולוגיות, מתן פתרונות ועוד.
דרישות:
- 5 שנות ניסיון בתחום אבטחת מידע
- 3 שנות ניסיון ארכיטקט/ית סייבר
- ניסיון בליווי והטמעה של תשתיות מאובטחות ופרויקטים עסקיים בשירותי ענן
- הכרות עם תשתיות ותהליכי פיתוח, DevOps ו- Containers
- ניסיון בביצוע סקרי קוד Static Code Analysis המשרה מיועדת לנשים ולגברים כאחד.
 
עוד...
הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8408394
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
13/11/2025
Location: Tel Aviv-Yafo
XM Cyber is a leading hybrid cloud security company that’s changing the way organizations approach cyber risk. XM Cyber transforms exposure management by demonstrating how attackers leverage and combine misconfigurations, vulnerabilities, identity exposures, and more, across cloud and on-prem environments to compromise critical assets. With XM Cyber, you can see all the ways attackers might go, and all the best ways to stop them, pinpointing where to remediate exposures with a fraction of the effort. We are seeking a customer-focused Security Analyst to join our managed services team. As a Customer-Facing Security Analyst, you will play a critical role in delivering top-notch exposure remediation services to our clients. You will work closely with customers to assess, analyze, and mitigate exposures in their IT and cloud infrastructure, while providing expert guidance and maintaining strong client relationships. Responsibilities:
* Own and manage the primary technical relationship for a portfolio of enterprise customers, establishing yourself as their trusted security advisor and focusing on strategic security outcomes.
* Deliver continuous security posture assessments by leveraging the XM Cyber platform to translate complex technical findings into actionable, risk-based insights for customers.
* Master the XM Cyber platform to drive maximum value for customers, guiding them on configuration, best practices, and new features to ensure successful adoption and ROI.
* Drive remediation outcomes by acting as the liaison between customers and their internal teams (e.g., IT Operations, DevOps, Cloud Security), helping them prioritize efforts based on attack path analysis.
* Proactively track and report on progress, delivering regular status updates and executive-level business reviews (QBRs) that demonstrate risk reduction and program success.
* Act as a trusted advisor on exposure and attack path management, translating industry trends into proactive, tailored recommendations that enhance your customers' security posture.
* Partner with the broader account team, including Customer Success Managers and Support Engineers, to ensure a seamless customer experience. Act as the lead technical escalation point to resolve complex challenges and champion customer needs with internal teams like Product and R&D.
Requirements:
* 5+ years in a customer-facing cybersecurity role (e.g., Customer Success Manager, TAM, Security Consultant), with proven experience managing and retaining a portfolio of large enterprise clients. Experience in a managed security service (MSSP) or cybersecurity SaaS company is a strong plus.
* A strong technical foundation in security operations, specifically in vulnerability management, exposure remediation, and/or attack path management.
* Hands-on experience with major cloud platforms (AWS, GCP, Azure) and their security principles.
* Experience applying and advising clients on common security frameworks (NIST, CIS Controls, ISO 27001) and regulations (GDPR, HIPAA).
* Exceptional communication and presentation skills, with the ability to articulate complex technical concepts to both technical practitioners and executive stakeholders.
* Outstanding analytical abilities and an autonomous, self-driven learning style.
* Native-level fluency in English.

This position is open to all candidates.
 
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Physical Design Engineer, you will collaborate with Functional Design, Design for Testing (DFT), Architecture, and Packaging Engineers. Additionally, you will solve technical problems with innovative micro-architecture and practical logic circuits solutions, while evaluating design options with optimized performance, power, and area in mind.
The AI and Infrastructure team is redefining whats possible. We empower our company customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers, our company Cloud customers, and billions of our company users worldwide.
We're the driving force behind our company's groundbreaking innovations, empowering the development of our cutting-edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for our company Cloud, our company Global Networking, Data Center operations, systems research, and much more.
Responsibilities
Define and drive the implementation of physical design methodologies.
Take ownership of one or more physical design partitions or top level.
Drive to the closure of timing and power consumption of the design.
Contribute to design methodology, libraries, and code review.
Define the physical design related rule sets for the functional design engineers.
Requirements:
Minimum qualifications:
Bachelors degree in Electrical Engineering or equivalent practical experience.
4 years of experience with System on a Chip (SoC) cycles.
Experience with advanced design, including clock/voltage domain crossing, DFT, and low power designs.
Experience in high-performance, high-frequency, and low-power designs.
Preferred qualifications:
Masters degree in Electrical Engineering, or a related field.
Experience coding with System Verilog and scripting with Transaction Control Language (TCL).
Experience with Very Large Scale Integration (VLSI) design in SoC.
Experience with multiple-cycles of SoC in ASIC design.
Experience with layout verification and design rules.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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11/11/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
our company Infinity External Risk Management, otherwise known as Cyberint, continuously reduces external cyber risk by managing and mitigating an array of external cyber security threats with one unified solution.
We are looking for a Cyber Threat Intelligence Analyst to be an integral part of our Intelligence teams, combining both cutting-edge technology and advanced threat intelligence analysis methodologies to deliver high-impact briefings to our customers.
Key Responsibilities
Learning the customer needs and PIRs, configuring their tailored environments in the ERM intelligence platform and supporting the customers with tuning/training throughout engagement
Monitoring and analyzing threats targeting customers, or issues in their digital exposure, in order to produce actionable intelligence alerts and reports.
Investigating intelligence sources, threat actors, attack tools and techniques
Identifying and developing ERM data sources to collect the most relevant intelligence (darknet, forums, social media, marketplaces, etc.) as well as creating and maintaining avatars on these.
Developing the proprietary intelligence platform by surfacing new modules, capabilities and features
Joining meetings with prospects and clients to present deliverables.
Drive cooperation & feedback loops with other ERM teams.
Requirements:
1-2 years experience with intelligence analysis processes (army included), including Open-Source Intelligence (OSINT) and Web Intelligence (WEBINT) gathering, link analysis, and threat actor profiling
Inherent passion for Infosec and service excellence, understanding of cybersecurity
Investigative and analytical problem-solving skills
Knowledge of analytical tools, including excel
Fluent English
Native German Speaker
Infosec certifications an advantage
Customer facing background an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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11/11/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are seeking a talented AI Technical Marketing Engineer to bridge the gap between technical product teams and marketing - delivering deep technical insights and creating impactful content for technical audiences.
In this role, you will work hands-on with cutting-edge AI technologies that power our companys products and strategy. This position involves full exposure to AI-driven solutions, requiring strong technical understanding and curiosity to explore emerging AI applications in cybersecurity.
Youll build and configure environments, analyze AI-based technologies, and support a comprehensive understanding of AI through diverse technical initiatives.
Key Responsibilities
Develop high-quality technical content such as whitepapers, case studies, demos, and technical blogs.
Work closely with engineering and product teams to translate complex AI features into clear, impactful messaging.
Support the technical enablement of sales teams and partners.
Participate in industry events and webinars as a technical advocate.
Requirements:
5+ years of proven experience in a Technical Marketing or comparable technical role, preferably within the cybersecurity industry.
Strong technical background and understanding of AI and cybersecurity technologies - hands-on experience is a major plus.
Prior TME or pre-sales experience with an AI-focused product or vendor is a strong advantage, but not mandatory. Candidates with a solid technical foundation and passion to develop AI expertise are encouraged to apply.
Degree in Computer Science, Engineering, or a related field is an advantage.
Willingness to travel 12 times per quarter.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8409787
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סגור
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
11/11/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
our company Infinity External Risk Management, otherwise known as Cyberint, continuously reduces external cyber risk by managing and mitigating an array of external cyber security threats with one unified solution.
We are looking for a Cyber Threat Intelligence Analyst to be an integral part of our Intelligence teams, combining both cutting-edge technology and advanced threat intelligence analysis methodologies to deliver high-impact briefings to our customers.
Key Responsibilities
Learning the customer needs and PIRs, configuring their tailored environments in the ERM intelligence platform and supporting the customers with tuning/training throughout engagement
Monitoring and analyzing threats targeting customers, or issues in their digital exposure, in order to produce actionable intelligence alerts and reports.
Investigating intelligence sources, threat actors, attack tools and techniques
Identifying and developing ERM data sources to collect the most relevant intelligence (darknet, forums, social media, marketplaces, etc.) as well as creating and maintaining avatars on these.
Developing the proprietary intelligence platform by surfacing new modules, capabilities and features
Joining meetings with prospects and clients to present deliverables.
Drive cooperation & feedback loops with other ERM teams.
Requirements:
1-2 years experience with intelligence analysis processes (army included), including Open-Source Intelligence (OSINT) and Web Intelligence (WEBINT) gathering, link analysis, and threat actor profiling
Inherent passion for Infosec and service excellence, understanding of cybersecurity
Investigative and analytical problem-solving skills
Knowledge of analytical tools, including excel
Fluent English
Native German Speaker
Infosec certifications an advantage
Customer facing background an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8409775
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11/11/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an exceptional and passionate Competitive Intelligence Analyst (Technical AI Security Focus) to join our companys Competitive Intelligence Group. This role sits at the intersection of cutting-edge AI-driven cybersecurity and strategic technical analysis.
If you are highly analytical, deeply technical, passionate about AI security, and motivated by uncovering insights that influence product and go-to-market strategy this is your opportunity to make a real impact. You will research and analyze the evolving AI threat landscape, evaluate emerging technologies, and help shape how our company competes and leads in the AI security domain.
Key Responsibilities
Conduct in-depth technical research and hands-on analysis of competitor products and AI security solutions focusing on AI-Security and prevention capabilities
Gather and synthesize intelligence from public sources, customer feedback, analyst reports, and hands-on lab testing to understand and counter competitor claims.
Track and analyze the AI threat landscape, including adversarial AI, generative AI risks, and LLM-related security trends.
Develop competitive materials (battlecards, deep-dive reports, technical comparisons) to empower our companys sales, marketing, and product teams.
Collaborate with R&D, Product Management, and Threat Intelligence teams to validate findings and identify technical differentiators.
Engage with sales engineers and field teams to deliver competitive enablement sessions, presentations, and webinars.
Monitor and influence analyst firms (Gartner, Forrester, IDC) with data-driven competitive insights about our companys AI security capabilities.
Support cross-functional strategy initiatives involving AI security positioning, product development, and market readiness.
Work proactively to identify future competitors, market disruptors, and technology shifts related to AI and cybersecurity.
Requirements:
24 years experience in cybersecurity, competitive intelligence, or technical product analysis roles.
Strong understanding of AI/ML technologies and their application in cybersecurity (e.g., detection models, AI-driven analytics, LLM-based tools).
Familiarity with AI threat vectors, including model poisoning, prompt injection, data leakage, and adversarial attacks.
Technical background in network security, cloud security, or endpoint protection mandatory.
Hands-on experience with security vendors such as our company, Palo Alto Networks, Cisco, or Fortinet advantage.
Experience with virtualization (VMware) and cloud platforms (AWS, Azure, GCP) advantage.
Knowledge of Threat Prevention, SASE, SaaS Security.
Familiarity with AI governance, responsible AI frameworks, and security evaluation methods plus.
Excellent communication and presentation skills in English (written and spoken).
Characteristics:
Technically strong with a deep curiosity for AI and cybersecurity.
Skilled multitasker who thrives in a high-paced, data-driven environment.
Analytical thinker who can translate complex technical data into clear, actionable insights.
Self-starter with a can-do attitude and strong ownership mindset.
Comfortable working across teams from engineers to executives.
Autodidact and continuous learner, always exploring emerging AI technologies.
Willingness to travel internationally up to 4 times per year.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8409758
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
10/11/2025
Location: Tel Aviv-Yafo
Job Type: Full Time
We are looking for an exceptional and passionate Competitive Intelligence Technical Engineer. A Member of the competitive technical analysis/intelligence group for our companys security portfolio.
If you are tech savvy and technical with great research skills, excel in collection and analysis, are driven by curiosity and passion, and seek a unique opportunity to grow and contribute in an exciting and rewarding environment, then we want to meet you!
Key Responsibilities
Proactively gather information on competing products, including detailed functionality to understand, confirm and authoritatively negate competitor's claims via documentation and Hands-ON testing.
Tracking data on our competitors, preparing hard-hitting competitive materials for our company sales force, helping our sales force respond to competitive situations and creating effective marketing programs to highlight our competitive differentiation.
Educating and helping our sales force to better understand competitor's offerings and how to respond to competitive situations.
Attending meetings with our company's salesforce, partners, and customers. hosting webinars to present the competitive materials you've created.
Work with Product Organization (R&D, product managers, QA) to identify the most compelling competitive differentiation for our products & most compelling features of competitive products.
Work cross-functionally to ensure competitive information and positioning for all products and solutions in our core business, and own the process of responding quickly to maximize opportunities with press/analysts/customers.
Track, report, and influence analysts (Gartner, IDC) market share reports; track our competitors, their products, their go-to-market strategies and their financial and market performance.
Work with strategic goals and identify priority activities and assignments.
Requirements:
This Role requires a mandatory minimum 2-3 years experience Technical Background:
Networking knowledge: switching, bridging, routing. - mandatory.
knowledge with Virtualization (VMware).
Experience with our company security products. big advantage.
Experience with security solutions like NGFW, Cloud security, Email security, Endpoint security, XDR, SASE, IoT/OT, SaaS Security. big advantage.
Proficiency and know how in new products.
Experience with installing and implementing cyber security vendors like Palo Alto Networks, Fortinet, Cisco and others an advantage.
Knowledge with Threat Prevention/AI/ML an advantage.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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8407533
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