לוח משרות דרושים SOC/SIEM בתל אביב יפו

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will use your ASIC design experience to be part of a team that develops the ASIC SoC from Plan of Record (POR) to Production. Creating SoC Level micro architecture definitions, RTL coding and all RTL quality checks. You will also have the opportunity to contribute to design flow and methodologies. You will collaborate with members of architecture, software, verification, power, timing, synthesis dft etc. You will face technical tests and develop/define design options for performance, power and area.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Participate in architecture feedback.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the formal verification strategy and create the properties and constraints for digital design blocks.
Utilize formal property verification tools combined with formal verification closure techniques to verify properties.
Contribute improvements to methodologies to enhance formal verification results.
Architect and implement reusable formal verification components.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
Perform Register-Transfer Level (RTL) coding (coding and debug in Verilog, SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure activities.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
The ML, Systems, and Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the SoC/block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.
Perform Register-Transfer Level (RTL) development (e.g., coding and debug in Verilog, System Verilog), function/performance simulation debug and Lint/Cyber Defense Center/Formal Verification/Unified Power Format checks.
Participate in synthesis, timing/power closure, and Application-Specific Integrated Circuit (ASIC) silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
our company System Infrastructure builds the cloud for our company services and for our company Cloud customers, by solving business test of performance, cost, and scale, utilizing hardware, software, and system solutions.The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Plan the verification strategy, identify the platform to validate reasoning components.
Define the test plan and strategy with stakeholders, including sign-off and exit criteria.
Plan and execute the verification of Internet Protocols (IPs) using dynamic verification and formal verification.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. The ML, Systems, & Cloud AI (MSCA) organization at our company designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all our company services (Search, YouTube, etc.) and our company Cloud. Our end users are our customers, Cloud customers and the billions of people who use our company services around the world.
We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including our company Clouds Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Responsibilities
Define the block-level design document (e.g., interface protocol, block diagram, transaction flow, pipeline, etc.).
Perform Register-Transfer Level (RTL) coding (coding and debug in Verilog, SystemVerilog), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power closure activities.
Participate in test plan and coverage analysis of the block and SoC-level verification.
Communicate and work with multi-disciplined and multi-site teams.

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our company's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a SoC Design Verification Engineer, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and drive verification closure.
As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers on projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full life-cycle of verification, which can range from verification planning, test execution, to collecting and closing coverage.Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our company platforms, we make our company's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.
Identify and write all types of coverage measures for corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

As a Managed Services Lead Consultant within our companys Infinity Global Services (IGS) Managed eXtended Detection and Response (MXDR) team, you will play a key role in protecting our customers digital assets, sensitive data, and critical infrastructure.
You will leverage your expertise in threat detection, incident response, and cloud security to monitor complex environments, identify vulnerabilities, and respond to evolving cyber threats in real time. Working in close collaboration with cross-functional teams, you will develop and implement tailored security strategies that align with industry standards and customer-specific requirements.
This role is ideal for a self-motivated professional with strong technical acumen, a passion for cloud technologies, and a proactive mindset for staying ahead of emerging security threats.
Key Responsibilities
Deliver advanced security monitoring services in collaboration with DevOps, product teams, and clients, leveraging SIEM and XDR/EDR solutions such as Microsoft Sentinel, Defender, and our company Harmony.
Monitor, analyze, and investigate security events across cloud environments (especially Azure), using logs and open-source intelligence to identify threats and reduce false positives.
Develop and maintain environment-specific rules, alerts, and dashboards within SIEM tools, ensuring alignment with client-specific security and compliance needs.
Create and maintain detailed documentation, including analytical reports, SOPs, training materials, and technical guidelines.
Provide expert support and guidance in resolving complex security issues, automating tasks, and enhancing operational workflows.
Support 24/7 operations through on-call rotations, ticket management, and real-time cybersecurity monitoring and response.

Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Designing and implementing SOC level clock requirements
Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

We are now looking for a AI Networking Chip Security Architect we are looking for an outstanding security architect with Networking focus to design, validate, and guide implementation of secure architecture of its core products. The candidate is expected to: define problems & deliver highly innovative solutions that lead to significant differentiation in the industry, translate customer needs into architectural, technical & strategic direction, and help to resolve objectives & long-range goals of the Security organization. Leaders in this role will help reduce risk, threats, and vulnerabilities and design new security technologies in our company networking products.
What youll be doing:
Own the security requirements for next gen networking chips in a verity of product lines.
Lead new security technologies definitions into the roadmap of our company Networking devices.
Work with technical and senior leadership staff to turn business directives into functional implementations.
Collaborate between multiple business units and development groups to ensure robust, secure service posture from design to implementation.
Provide hands-on security engineering expertise across a wide variety of platforms.
This role extends across multiple groups and excellent working knowledge in the following areas of expertise is necessary for success:
Chip Security Architecture
Embedded System Architecture and Design
Security around interconnects and protocols
Security Standards
Cryptography.

we are looking for a Cyber Security Engineer with a solid technical background in cyber security to lead the implementation of Velocity XDR product and ensure that meet its clients cyber security needs.
As a Cyber Security Engineer in a fast-expanding operation team, you will be responsible for onboarding new global clients to the MXDR services, developing and maintaining detection scenarios and alerts, analysing the client's environment, and providing technical support and guidance to clients. To excel in this role, you will demonstrate strong technical aptitude, dedication to delivering high-quality work, and a cooperative approach to teamwork.
Main Responsibilities:
Lead the onboarding process for all new clients joining the MXDR services, working closely with the clients IT and security teams to ensure smooth implementations.
Develop detection scenarios and alerts for XDR solution (Velocity) to ensure effective threat detection and response.
Oversee Velocity KPIs and measurements set by the client, adjusting, analyzing and maintaining them according to their needs and tracking the impact of the platform on the client's networks, endpoints, applications, and cloud environments.
Continuously improve Velocity monitoring capabilities and keep up-to-date with the latest developments in the cyber threat landscape.
Provide technical support and guidance to clients on Velocity security-related issues, including implementing security best practices and ensuring compliance with industry standards.

we are looking for a MXDR Analyst to join the team of cybersecurity analysts monitoring services 24/7, tiers 1-2. The role includes development of detection analyses, triage of alerts, investigation of security incidents, proactive threat hunting and enhancement of sensors and overall visibility status. The suitable candidate should be a team player with previous experience in SOC, SecOps or security monitoring, independent, and with a can-do attitude.
Responsibilities:
Working across all areas of SOC, including continuous monitoring and analysis, threat hunting, security compliance, security event auditing and analysis, rule development and tuning, and forensics.
Solving security incidents in accordance with defined service level agreements and objectives.
Prioritizing and differentiating between potential incidents and false alarms.
Addressing clients enquiries via phone, email, and live chat.
Working side-by-side with customers, providing insightful incident reports.
Working closely with peers and higher-tier analysts to ensure that your analysis work meets quality standards.
Identifying opportunities for improvement and automation within the MXDR Operation Lead, and leading efforts to operationalize ideas.
Identifying and offering solutions to gaps in current capabilities, visibility, and security posture.
Correlating information from disparate sources to develop novel detection methods.

Today, were tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing whats never been done before takes vision, innovation, and the worlds best talent. As a worker, youll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The our company's System-On-Chip (SOC) group is looking for a top physical design engineer with a curiosity about SOC design optimization, physical integration, chip build and assembly and verification. You should have real passion for methodologies and clock distribution solutions that enable SOC creation in the most optimized way. In this position, you will get the opportunity to build complex networking chips and directly contact unit-level owners, Physical Design, CAD, Package Design, Software, DFT and other teams.
What you'll be doing:
Designing and implementing SOC level clock requirements
Daily work involves aspects of chip level design, including partitioning, CDC, trial synthesis, design quality checks
Be exposed and work on a variety of functional and structural challenges. Including functional debug, physical design readiness, resolve design quality issues.

We are looking for a IT Risk Management and SOC2 Manager.
The IT risk management team specializes in identifying and mitigating technological risks, developing solutions, and enhancing organizational systems and processes to prevent potential business impact. Leveraging local experts with global experience in complex projects, unique methodologies, and advanced technological tools, the team partners with leading companies across technology, industry, and finance. Our projects span collaborations with US and the largest organizations in Israel, including major banks and top technology companies traded in the US.
Role Overview:
As a Manager in the TPA practice, you will lead and oversee multiple client engagements from initiation through to the reports. You will be responsible for managing project timelines, budgets, and team members, ensuring high-quality deliverables and client satisfaction.
Your role will include:
Managing end-to-end IT risk management and assurance engagements, including planning, execution, and reporting.
Overseeing the delivery of Information Security and IT Governance Risk and Compliance (GRC) services.
Leading SOC2 and SOC1 audits, information systems risk assessments, cyber risk surveys, and both external and internal IT audits.
Consulting on and testing automated controls within business processes and organizational systems, and establishing methodologies for IT risk management in cloud and digital environments.
Advising clients on authorization processes and segregation of duties (SoD) in information systems and business operations.
Managing and mentoring team members, allocating resources, and monitoring engagement hours to ensure projects are delivered on time and within budget.
Serving as the primary point of contact for clients, maintaining strong relationships and ensuring their needs are met throughout the engagement lifecycle.