You are a highly motivated, customer-focused engineering professional with a passion for enabling next-generation semiconductor solutions. You thrive in dynamic, collaborative environments and are energized by solving complex technical challenges. With a thorough understanding of ASIC and SoC design flows, you bring hands-on experience in integrating cutting-edge interface IPs, including DDR/LPDDR, ETH and PCI Express, into advanced silicon products. Your technical acumen is matched by your communication skills, allowing you to translate intricate engineering concepts to diverse audiences, from internal teams to external customers. You are comfortable working independently and as part of a broader team, demonstrating adaptability, resourcefulness, and a continuous learning mindset.
You excel in managing multiple priorities, delivering high-quality results within tight deadlines, and approaching new protocols and technologies with curiosity and rigor. Your organizational skills help you keep projects on track, while your customer-centric approach ensures you build trusted relationships. You appreciate opportunities to engage with industry leaders and are enthusiastic about contributing to the success of Synopsys' customers by guiding them through the integration and validation of our world-class Interface IP. If you are seeking a role where your technical expertise and interpersonal skills will have a direct impact on the industrys most innovative products, this is the perfect opportunity for you.
What Youll Be Doing:
Providing technical guidance and hands-on support to customers integrating Synopsys Interface IP (PCI Express and High Speed SerDes design) into their ASIC SoC/systems
Conducting detailed integration reviews at key customer milestones and troubleshooting complex integration challenges throughout the SoC design flow.
Collaborating with customers to resolve technical issues related to RTL simulation, synthesis, floorplanning, timing closure, and silicon/system bring-up.
Supporting silicon bring-up and characterization in system environments, ensuring successful deployment of Synopsys IP in customer products.
Documenting best practices, developing application notes, and delivering training to enable customer success with Synopsys solutions.
Participating in cross-functional teams to relay customer feedback, contribute to product improvements, and stay current with the latest interface protocols and industry standards.
Occasionally traveling to customer sites for on-site support, integration reviews, and system bring-up activities.
Requirements: Bachelors and/or masters with a minimum 10+yrs of Industry experience or equivalent
At least 5+ years of experience in IP design, ASIC/SoC integration, or related customer-facing engineering roles (exceptional candidates with strong silicon debug and academic background considered).
Solid understanding of ASIC design flows, including simulation/verification, RTL synthesis, floorplanning, physical design, and timing closure.
Hands-on expertise in integration and validation of High Speed SerDes IPs for PCIe, ETH, USB
Proficient in RTL and gate-level simulation debugging, with familiarity in front-end tools like Design Compiler, Fusion Compiler, and PrimeTime.
Experience with silicon bring-up and system-level characterization in lab environments.
Domain knowledge of PCI Express and SERDES and their implementation flows.
This position is open to all candidates.