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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required CPU Design Integration Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define and implement solutions for design, integration and verification problems using in-house and external technical solutions or tools.
Involve in project development and convergence with the highest quality, agreement with issues as they arise through design and implementation, or equivalent relevant experience.
Connect between RTL design, physical design, DFT, external IPs and SoC while maintaining project priorities.
Maintain project infrastructure and stability.
Ensure chip quality by implementing best practices and implementing quality control measures.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, a related field, or equivalent practical experience.
4 years of experience with design from micro-architecture through implementation with Verilog/SystemVerilog, or VHSIC Hardware Description Language (VHDL).
Experience in scripting.
Preferred qualifications:
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Excellent multitask and facilitation skills.
Excellent problem-solving and communication skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8642072
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Silicon Validation Engineer, Networking
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Responsibilities
Define, develop and execute post-silicon validation content on both pre-silicon setups and real silicon platforms in the lab.
Drive silicon from being a chip towards becoming a product.
Debug and investigate issues along cross-functional teams such as Firmware (FW), Software (SW), Design, Design Verification (DV), Architecture (ARCH) and multiple production teams.
Provide a quality functional coverage for our designs.
Test development and automation, design, implement, and maintain validation tests using scripting and programming languages (e.g., Python, C/C++).
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical/Computer Engineering, Computer Science, related fields, or equivalent practical experience.
Experience with functional tests for silicon validation using C or C++.
Experience in silicon bring-up, functional validation, characterizing, and qualifying silicon.
Preferred qualifications:
Experience in packet processing, data path, packet buffering, scheduler, networking protocols offload engine.
Experience in PCIe interface, PCIe Internal Switch, PCIe components RP/EP, and link establishment.
Experience with hardware prototyping, including hardware/software integration (i.e., pre-silicon use of emulation, software-based test, and diagnostics development).
Knowledge of L1/L2 layers, Ethernet SerDes (Serializer/Deserializer), Media Access Control+Physical Coding Sublayer (MAC+PCS).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
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עדכון קורות החיים לפני שליחה
8642066
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Technical Program Manager, Silicon Development
About the job
A problem isnt truly solved until its solved for all. Thats why users build products that help create opportunities for everyone, whether down the street or across the globe. As a Technical Program Manager, youll use your technical expertise to lead complex, multi-disciplinary projects from start to finish. Youll work with stakeholders to plan requirements, identify risks, manage project schedules, and communicate clearly with cross-functional partners across the company. You're equally comfortable explaining your team's analyses and recommendations to executives as you are discussing the technical tradeoffs in product development with engineers.
In this role, you will use technical and management experience to manage the development and execution of System on a chip (SoC) projects. You will plan programs and manage their execution from concepts through development to production. You will collaborate with architecture, design, verification, physical implementation and manufacturing teams throughout the SoC execution lifecycle. You will be making technical decisions for the chip designs and methodology, driving project schedules, identifying risks and communicating them to all stakeholders, and managing partner teams.
In this role, you will work to shape the future of an edge-AI product, bringing high-performance intelligence to the edge. You will have an opportunity to drive distributed inference technology that powers real-time systems where latency and reliability.
Responsibilities
Plan, coordinate, and deliver custom silicon products.
Scope out the project, generate task lists, build a project timeline and work with the teams to make it into reality.
Lead the data-motivated schedules and milestones, track the progress, identify potential future issues, and identify mitigations with the team leaders.
Drive technical, budgetary, and schedule trade-off discussions with cross-functional teams.
Manage project execution and issues through design, development, test, manufacturing, deployment and sustaining activities for silicon and hardware products.
Requirements:
Minimum qualifications:
Bachelor's degree in Computer Science, Electrical Engineering or equivalent practical experience.
8 years of experience in program management.
Experience in architecture, design, verification, implementation, or validation across 7 chip development cycles.
Experience with managing technical cross-functional projects.
Experience in leading, developing and growing teams.
Preferred qualifications:
Master's degree or PhD in Engineering, or a related field.
Experience as an engineer or manager in developing hardware or software systems around the chips.
Experience with two or more chip cycles in a project management role with execution within resource and schedule constraints.
Knowledge of data centers and cloud markets, technological and business trends, requirements, and ecosystem partners.
Ability to collaborate to achieve goals.
Excellent communication and facilitation skills.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642060
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Staff Design Engineer, Networking, Cloud
About the job
In this role, you will be part of a team developing application-specific integrated circuits (ASICs) used to accelerate networking in data centers. You will have multiple responsibilities in areas such as project definition, design, and implementation. You will participate in the design, architecture, documentation, and implementation of the next generation of data center accelerators.You will also be responsible for performance analysis for a networking stack using your knowledge.
Responsibilities
Lead an ASIC subsystem.
Understand how it interacts with software and other ASIC subsystems to implement data center networks.
Define hardware/software interfaces. Write micro architecture and design specifications.
Define efficient micro-architecture and block partitioning/interfaces and flows.
Collaborate closely with software, verification, and physical design stakeholders to ensure the designs are complete, correct, and performant.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
Experience developing Register-Transfer Level (RTL) for ASIC subsystems.
Experience with cross-functional engagement in micro-architecture, design, verification, logic synthesis, and timing closure.
Preferred qualifications:
Experience working with software teams optimizing the hardware/software interface.
Experience architecting networking switches, end points, and hardware offloads.
Experience working with design networking like: remote direct memory access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in transmission control protocol (TCP), IP, ethernet, peripheral component interconnect express (PCIE) and dynamic random access memory (DRAM) including network on chip (NoC) principles and protocols (e.g., AXI, ACE, and CHI).
Proficiency in procedural programming language (e.g., C++, Python, Go).
Understanding of packet classification, processing, queuing, scheduling, switching, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642058
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Emulation Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of our platforms, we make our product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
Responsibilities
Maintain and upgrade emulation models and infrastructure and act as a primary interface to emulation vendors.
Explore emulation methodologies, gather feedback from the team and customers, and implement emulation workflows and methodologies.
Create tooling and automation to support emulation Electronic design automation (EDA) tools, licensing, and job management in our infrastructure.
Support emulation team members with debugging hardware, tooling, and project-specific issues.
Help to bring up external interfaces (e.g., DDR, Peripheral Component Interconnect Express (PCIe), Ethernet, etc.) on the emulation platforms and create standalone test cases for tool issues encountered in the emulation compile and runtime flows.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with emulation systems (e.g., ZeBu Server, Palladium, Veloce), compilation, debug, performance and methodology enhancements.
Experience with coding and scripting in C, C++, Perl, TCL, or Python.
Experience with associated EDA tools, automation, and flow enhancements.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture.
Experience with hardware verification concepts and tools (e.g., simulation, coverage, assertions, CPU Arch, SoC, fabric, networking).
Experience with FPGA systems (e.g., EP, HAPS, Protium).
Experience with hybrid emulation or speed bridges.
Experience with coding in Verilog/SystemVerilog for design.
Experience with design debug tools (e.g., Verdi, Verisium).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642056
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דיווח על תוכן לא הולם או מפלה
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required SoC Vision Architect, Silicon, Cloud
About the job
In this role, youll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers our most demanding AI/ML applications. Youll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a SoC Vision Architect in our Silicon team, you will be at the heart of defining the hardware that powers the next-generation of our products. You will bridge the gap between Artificial Intelligence (AI) research and physical silicon, architecting the Image Signal Processor (ISP), CODECS and the pixel data path. You will deliver unparalleled image quality while staying within the tight Power, Performance, and Area (PPA) constraints. You will participate in the concept, architecture, documentation, and implementation of a new product.
Responsibilities
Define a flexible imaging pipeline hardware architecture, from the sensor interface (e.g., Mobile Industry Processor Interface (MIPI)) through the ISP, the encoder/decoder, scaling and memory output.
Partner with our research to transform advanced computational imaging algorithms into high-efficiency hardware logic.
Conduct trade-off analyses between power, performance, and silicon area to meet thermal envelopes and current limitations.
Influence external executive vendor roadmaps, ensuring deep co-optimization between their future products and our custom silicon.
Lead collaboration across Architecture, Register-Transfer Level (RTL), Physical Design and Validation teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
15 years of experience in SoC architecture, specifically focusing on imaging (JPEG), video (H.264, H.265, AV1) and Image Signal Processor (ISP).
Experience in Complementary Metal Oxide Semiconductor (CMOS) image sensor architecture.
Experience in writing architecture specifications.
Preferred qualifications:
Masters degree or PhD in Electrical Engineering, Computer Engineering, or a related field.
Experience working with various Software Driver teams.
Familiarity with deploying neural networks on specialized hardware (e.g., Neural Processing Units (NPUs)/TPUs) for imaging tasks (e.g., AI-based denoising or super-resolution).
Knowledge of Mobile Industry Processor Interface (MIPI) (e.g., C-PHY/D-PHY) and memory subsystem interactions (e.g., Dynamic Random Access Memory (DRAM)/Low-Power Double Data Rate (LPDDR)).
Knowledge of hardware/software interfaces.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642054
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Rק/וןרקג Power and Signal Integrity Engineer, PhD Graduate
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a Power and Signal Integrity Engineer, you will be responsible for the design and characterization of signal and power integrity of our IC designs. You will design the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives and set up methodologies, perform simulations, silicon characterization and correlations to ensure our IC designs meet systems design budgets and achieve the highest performance. You will work with systems architects, ASIC design, systems engineers, and partner cross-functionally with teams and external vendors/partners.
Responsibilities
Generate precise electrical models (e.g., S-parameters, SPICE models) for components such as packages, PCBs, and connectors for use in simulations.
Simulate high speed interface electrical behavior using HSPICE or other circuit simulators.
Execute lab measurements utilizing test equipment like oscilloscopes, Vector Network Analyzers (VNA), Time Domain Reflectometers (TDR), spectrum analyzers to validate simulation outcomes and debug signal and power-related issues on silicon prototypes and boards.
Establish design rules and guidelines for optimal signal/power integrity during PCB and package layout, ensuring high production yield and reliability.
Document design specifications, analysis results, and validation reports to ensure compliance with standards and for future reference, while collaborating extensively with cross-functional teams, including ASIC architects, digital/analog designers, physical design/layout engineers, and system engineers.
Requirements:
Minimum qualifications:
PhD degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
Experience in any signal and power integrity domain of electrical engineering through internships, academic research, or publications.
Preferred qualifications:
Experience with industry-standard Electronic Design Automation (EDA) tools for simulation and layout (e.g., Cadence Sigrity/Allegro, Ansys HFSS/PowerDC/Q3D, Keysight ADS, Synopsys HSPICE).
Experience with signal and power integrity modeling and simulation for high-speed interfaces (e.g., LPDDR, MIPI, UFS, PCIe, USB).
Experience with SerDes testing in a lab setting, and familiarity with Ethernet, PCIE, and DDR standards.
Experience in scripting languages such as Python, Perl, or Tcl for flow automation and data analysis.
Familiarity with high-speed testing equipment like VNAs, TDRs, and oscilloscopes for measurement and validation.
Knowledge of circuit analysis, electromagnetics, and transmission line theory.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642051
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תודה על שיתוף הפעולה
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Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Digital Signal Processing Engineer, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
In this role, you will be responsible for turning communication theory into efficient, bit-exact silicon logic. You will take high-level models and transform them into the high-speed DSP blocks that anchor our next-gen architecture.
Responsibilities
Design and implement DSP algorithms for high-speed PHYs, focusing on feed-forward equalization (FFE)/decision feedback equalization (DFE) and timing recovery loops.
Perform fixed-point analysis to minimize bit-width (area/power) while maintaining the required signal-to-noise ratio (SNR).
Develop bit-exact C++/SystemC models to verify register-transfer level (RTL) against architectural intent.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
8 years of experience in digital signal processing (DSP) design or high-speed digital logic design.
Experience implementing digital blocks for communication systems or physical layer (PHY) architectures (e.g., filters, interpolators, or timing recovery).
Experience in MATLAB, Python, or C++ for algorithm modeling and fixed-point analysis.
Preferred qualifications:
Master's or PhD degree in Electrical Engineering, Computer Engineering, or a related technical field or equivalent practical experience.
Experience with fin field-effect transistor (FinFET) process nodes (5nm, 3nm) and timing closure at GHz frequencies.
Experience with universal verification methodology (UVM) verification environments.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642049
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a Data Engineer.
As a Data Engineer, you will provide data-driven decision making support for ' merchants. You will deliver an improved understanding of the merchants metrics and improve service and customer satisfaction.
Youll work closely with various teams, including Analytics & Research, Finance, Account Management, and Product Management.
What You'll Be Doing:
Work with various teams to define key metrics (KPIs) and provide the methodologies to accurately measure performance
Create new ETL processes and optimize existing ones
Create smart, innovative and effective visualization methods, and promote engagement and implementation of them
Requirements:
Bachelors Degree in Science/Data Systems Management/Industrial Engineering and Management
3+ years of experience as a Data Engineer - must
Experience with SQL - must
Experience with BI tools such as Tableau, Looker or similar - must
Knowledge in data modeling and DWH design - must
Experience in developing ETL processes - must
Experience with business requirements gathering - must
Experience with scripting languages - an advantage
Good comprehension of data, and how to tell the story behind it
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642045
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תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required RTL Design Technical Lead, Networking, Cloud
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As part of our Server Chip Design team, you will use your ASIC design experience to be part of a team that creates the SoC VLSI design cycle from start to finish. You will collaborate closely with design and verification engineers in active projects, creating architecture definitions with RTL coding, and running block level simulations.
In this role, you will contribute in all phases of Application-Specific Integrated Circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, software, verification, power, timing, synthesis, etc. to specify and deliver high quality SoC/RTL. You will solve technical problems with innovative micro-architecture and practical logic solutions, and evaluate design options with complexity, performance, power and area in mind.
Responsibilities
Define the block level design documents such as interface protocol, block diagram, transaction flow, pipeline, and more.
Perform RTL development (e.g., coding and debug in Verilog, SystemVerilog, VHDL), function/performance simulation debug, and Lint/CDC/FV/UPF checks.
Participate in synthesis, timing/power, and FPGA/silicon bring-up.
Participate in test plan and coverage analysis of the block and SOC-level verification.
Communicate and work with multi-disciplined and multi-site teams.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
10 years of experience architecting networking ASICs from specification to production.
8 years of experience in technical leadership.
Experience in one of the following areas: arithmetic units, bus architectures, processor design, accelerators, or memory hierarchies.
Experience developing RTL for ASIC subsystems.
Preferred qualifications:
Experience working with design networking like: Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in TCP, IP, Ethernet, PCIE and DRAM including Network on Chip (NoC) principles and protocols (AXI, ACE, and CHI).
Experience architecting networking switches, end points, and hardware offloads.
Understanding of packet classification, processing, queuing, scheduling, switching, routing, traffic conditioning, and telemetry.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642044
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מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a Senior DevOps Engineer.
What You'll Be Doing:
Design, build and manage our development and production cloud-native infrastructure in AWS
Establish and evolve standards for microservices (IaC modules, Helm charts, policies)
Build and maintain our product release workflow and continuous integration/delivery systems
Continuously improve visibility into its systems and applications with advanced monitoring, metrics, and log analytics, analysis
Understand, implement, and automate security controls, governance processes, and compliance validation
Play a key role in product planning and execution
Develop internal tools that remove friction and boost developer productivity.
Continuously evaluate and introduce new technologies to improve performance, reliability, and developer velocity
Requirements:
At least 5 years prior experience as a SRE/DevOps
Deep cloud experience (preferably AWS) and strong Infrastructure as Code skills
Must have cloud-native proficiency, including Kubernetes in production, familiarity with a service mesh (for example, Istio or Linkerd), and provisioning tools (for example, Karpenter)
Observability expertise with modern monitoring and log analytics
At least 1 year of programming experience or the ability to demonstrate strong programming proficiency
Experience with Build/Deploy/Continuous Integration tools
Ability to prioritize tasks and work independently
Experience in Go or Node.js (huge advantage).
History of open-source involvement (issues, pull requests, talks, or meetups) (advantage).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642042
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
07/05/2026
Location: Tel Aviv-Yafo
Job Type: Full Time
we are looking for a Site Reliability Engineering.
What You'll Be Doing:
Design, build and manage our development and production cloud-native infrastructure in AWS
Establish and evolve standards for microservices (IaC modules, Helm charts, policies)
Build and maintain our product release workflow and continuous integration/delivery systems
Continuously improve visibility into its systems and applications with advanced monitoring, metrics, and log analytics, analysis
Understand, implement, and automate security controls, governance processes, and compliance validation
Play a key role in product planning and execution
Develop internal tools that remove friction and boost developer productivity.
Continuously evaluate and introduce new technologies to improve performance, reliability, and developer velocity
Requirements:
At least 5 years prior experience as a SRE/DevOps
Deep cloud experience (preferably AWS) and strong Infrastructure as Code skills
Must have cloud-native proficiency, including Kubernetes in production, familiarity with a service mesh (for example, Istio or Linkerd), and provisioning tools (for example, Karpenter)
Observability expertise with modern monitoring and log analytics
At least 1 year of programming experience or the ability to demonstrate strong programming proficiency
Experience with Build/Deploy/Continuous Integration tools
Ability to prioritize tasks and work independently
Experience in Go or Node.js (huge advantage).
History of open-source involvement (issues, pull requests, talks, or meetups) (advantage).
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642039
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שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Engineering Manager, Cloud Storage
About the job
Like our own ambitions, the work of a Software Engineer goes beyond just Search. Software Engineering Managers have not only the technical expertise to take on and provide technical leadership to major projects, but also manage a team of Engineers. You not only optimize your own code but make sure Engineers are able to optimize theirs. As a Software Engineering Manager you manage your project goals, contribute to product strategy and help develop your team. Teams work all across the company, in areas such as information retrieval, artificial intelligence, natural language processing, distributed computing, large-scale system design, networking, security, data compression, user interface design; the list goes on and is growing every day. Operating with scale and speed, our exceptional software engineers are just getting started -- and as a manager, you guide the way.
With technical and leadership expertise, you manage engineers across multiple teams and locations, a large product budget and oversee the deployment of large-scale projects across multiple sites internationally.
File Solutions is the file system in the cloud from. Filestore provides a fully managed NFS service for Enterprise Cloud users which need file storage to replace their on-premise hardware when they move to the Cloud. This is an addressable market, with an opportunity to attract enterprises shifting to the cloud.
Responsibilities
Impact Control Plane definitions, design and methodologies for a new Software (SW) infrastructure.
Collaborate with various stake-holders, technical leaders, engineering managers and SWEs in order to fulfill team's mission and plan.
Grow and mentor the team, help others achieve career goals, identify roadblocks, prioritize efforts and reduce ambiguity.
Own plan and execution, working on multiple user facing features and architecture tasks.
Work with peers from other aspects of the product development life-cycle, including all File store engineering teams, product management, program management, SRE, UX/UI.
Requirements:
Minimum qualifications:
Bachelors degree, or equivalent practical experience.
8 years of experience in software development.
3 years of experience in a technical leadership role.
2 years of experience in a people management or team leadership role.
Preferred qualifications:
Master's degree or PhD in Computer Science or related technical field.
3 years of experience working in a complex, matrixed organization.
Experience with developing and architecting distributed storage systems.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642038
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo
Job Type: Full Time
Required Software Engineer III, Mobile iOS, Waze
About the job
Our software engineers develop the next-generation technologies that change how billions of users connect, explore, and interact with information and one another. Our products need to handle information at massive scale, and extend well beyond web search. We're looking for engineers who bring fresh ideas from all areas, including information retrieval, distributed computing, large-scale system design, networking and data storage, security, artificial intelligence, natural language processing, UI design and mobile; the list goes on and is growing every day. As a software engineer, you will work on a specific project critical to our needs with opportunities to switch teams and projects as you and our fast-paced business grow and evolve. We need our engineers to be versatile, display leadership qualities and be enthusiastic to take on new problems across the full-stack as we continue to push technology forward.
Waze is all about teamwork. The most innovative developers and designers work together in small groups to build products that are used by millions.
In this role, you will work side by side with Product and UX in a creative atmosphere with minimal documentation. You are self-supporting and a problem solver. You will be passionate about Waze, its community and always one step ahead in development platforms, new functionality and Application Programming Interfaces (API).
Making the world's information universally accessible and useful doesn't stop at the desktop. The Mobile team builds tools to get you the information you need no matter where you are. Android has become the world's most popular mobile ecosystem, powering billions of devices, from smartphones to tablets, watches to TVs and everything in between. Whether adding to the core Android experience, forging new markets for digital content, creating immersive and portable versions of our products or managing relationships with a global community of developers, the Mobile team is giving you us on the go.
Responsibilities
Design and implement advanced features for Waze App.
Help improve user experience for Waze on iOS.
Collaborate with visual designers, prototypers and product managers.
Contribute to existing documentation or educational content and adapt content based on product or program updates and user feedback.
Triage product or system issues and debug/track/resolve by analyzing the sources of issues and the impact on hardware, network, or service operations and quality.
Requirements:
Minimum qualifications:
Bachelors degree or equivalent practical experience.
2 years of experience with software development in Objective-C or Swift programming languages, or 1 year of experience with an advanced degree.
2 years of experience with iOS application development.
Preferred qualifications:
2 years of experience with software development in C or C++ programming languages, or 1 year of experience with an advanced degree.
2 years of experience with Shader programming in Metal or OpenGL shading Languages and graphic engines (Godot, Unity).
Understanding of GPU architecture and memory management.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642025
סגור
שירות זה פתוח ללקוחות VIP בלבד
סגור
דיווח על תוכן לא הולם או מפלה
מה השם שלך?
תיאור
שליחה
סגור
v נשלח
תודה על שיתוף הפעולה
מודים לך שלקחת חלק בשיפור התוכן שלנו :)
Location: Tel Aviv-Yafo and Haifa
Job Type: Full Time
Required Senior Silicon DFT Lead
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of our direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As the Design for Test (DFT) Engineer Lead, you will play a crucial role in DFT Architecture and DFT design, and support devices to production. You will be responsible for providing technical leadership in DFT, developing flows, automation, and methodology, planning DFT activities, tracking the DFT quality throughout the project life-cycle, and providing sign-off DFT to tapeout.
Responsibilities
Lead and execute DFT activities in the design, implementation, and verification solutions for Application-Specific Integrated Circuits (ASIC).
Develop DFT strategy and architecture, including hierarchical DFT, Memory Built-In Self Test (MBIST), and Automatic Test Pattern Generation (ATPG).
Work with other Engineering teams (e.g., Design, Verification, Physical Design) to ensure that DFT requirements are met and mutual dependencies are managed.
Manage a DFT team planning, deliverables, and provide technical mentoring and guidance.
Lead DFT execution of a silicon project, planning, execution, tracking, quality, and signoff.
Requirements:
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.
8 years of experience in Design For Test from DFT architecture to post silicon production support.
4 years of experience with people management.
Experience with DFT design and verification for multiple projects, DFT specification, definition, architecture, and insertion.
Experience with DFT techniques and common industry tools, DFT and Physical Design flows, and DFT verification flow.
Experience in leading DFT activities throughout the whole ASIC development flow.
Preferred qualifications:
Master's degree in Electrical Engineering or a related field.
Experience in post-silicon Debug, test or product engineering.
Experience in Joint Test Action Group (JTAG) and Internal JTAG (iJTAG) protocols and architectures.
Experience in SoC cycles, silicon bring-up, and silicon debug activities.
Knowledge of fault modeling techniques.
This position is open to all candidates.
 
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הגשת מועמדותהגש מועמדות
עדכון קורות החיים לפני שליחה
עדכון קורות החיים לפני שליחה
8642024
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